RadioHDL for FPGAs

RadioHDL for FPGAs


Category: Arithmetic Core

Created: May 15, 2019

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Planning

WishBone compliant: No

WishBone version: n/a

License: GPL



The purpose of RadioHDL is to speed up HDL development by providing a uniform and automated way of using tools and building code for FPGAs. The RadioHDL user guide provides the introduction to RadioHDL and a quick start example:


The RadioHDL package consists of a set of scripts that interpret configuration files and that setup or run tools. RadioHDL uses three kinds of configuration files to setup your source code and tools:

  • hdlbuildset<buildset_name>.cfg configuration file per FPGA board
  • hdltool<tool_name>.cfg configuration file per vendor tool
  • hdllib.cfg configuration file per HDL library

A RadioHDL configuration file contains a collection of key-value pairs. The configuration files are described in:


RadioHDL was first applied for an FPGA board called UniBoard1. The buildset description for the UniBoard1 provides a more advanced example, that shows how RadioHDL is used to develop HDL for an FPGA board using Mentor Modelsim for simulation and Intel/Altera Quartus for synthesis.

Currently these vendor tools are supported:


Currently these FPGA boards are supported:


The RadioHDL user guide describes how support for more FPGA boards and more vendor tools can be added to RadioHDL.

The concepts and working of the RadioHDL scripts are described in the RadioHDL programmer guide:


If you use (part of) the RadioHDL package please attribute the use as indicated this citation NOTICE:


The RadioHDL package is Open Source and available under the following LICENSE:


The RadioHDL package was developed at ASTRON and used in several projects, but others have contributed and are welcome to contribute as well. The CREDITS lists the contributers of RadioHDL: