I2S Serial Device to Parallel Interface

Details
Category: Communication Controller
Created: January 20, 2009
Updated: January 27, 2020
Language: VHDL
Other project properties
Development Status: Beta
Additional info: Design done
WishBone compliant: No
WishBone version: n/a
License: GPL
Description
I2S to Parallel Interface
This module provides a bridge between an I2S serial device (audio ADC, S/PDIF Decoded data) and a parallel device (microcontroller, IP block).
It's coded as a generic VHDL entity, so developer can choose the proper signal width (8/16/24 bit)
Input takes:
-I2S Bit Clock
-I2S LR Clock (Left/Right channel indication)
-I2S Data
Output provides:
-DATA_L / DATA_R parallel outputs
-STROBE and STROBE_LR output ready signals.
As soon as data is read from the serial I2S line, it's written on the proper parallel output and a rising edge of the STROBE signal indicates that new data is ready.
STROBE_LR signal tells if the strobe signal was relative to the left or right channel.
Parallel data (DATA_L / DATA_R) remain valid for the whole cycle (until next data is processed)
Features
- Supports arbitrary data width (through the generic width parameter)
Status
- 2009/01/20 : Uploaded Rev 1.0 and Testbench