Minimal RS232 UART Core

Minimal RS232 UART Core


Category: Communication Controller

Created: August 06, 2010

Updated: January 27, 2020

Language: Verilog

Other project properties

Development Status: Stable

Additional info: Design done, FPGA proven, Specification done

WishBone compliant: No

WishBone version: n/a

License: GPL


This core is part of the Milkymist System-on-Chip, the most advanced open source SoC for interactive multimedia applications.

  • Minimal UART core
  • No hardware FIFO
  • No modem control signals (just TX and RX)
  • Fully synchronous design
  • Configurable baud rate
  • Meant to interface with Milkymist CSR bus and an edge sensitive interrupt controller (like that of LatticeMico32)

More information