USB 1.1 FS Host Simulatiom Model in VHDL

USB 1.1 FS Host Simulatiom Model in VHDL


Category: Communication Controller

Created: February 10, 2011

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Beta

Additional info: Design done

WishBone compliant: No

WishBone version: n/a

License: LGPL


A USB FS Host simulation environment (test bench) in VHDL.

This USB FS test bench has been used with the Model Sim VHDL Simulator, however 4
any other 'event driven' VHDL simulator should work as well.

This test bench contains a 'Command Engine' that supports all 'low level' USB FS commands as

* Out Token Command
* In Token Command
* SOF Token Command
* Setup Token Command
* Data0 Command
* Data1 Command
* ACK Handshake Command
* NAK Handshake Command
* STALL Handshake Command
* USB Reset

Since all USB HS devices must be downward compatible, this FS simulation environment is also
useable for USB 2.0 designs. A true USB 2.0 implenentation needs some more work - few USB 2.0
commands as Data2, MData, NYET and PING are already implemented, however the CHIRP logic is
missing and a complete new clock logic will be required.

All commands are implemented as procedure calls, this procedures add the synchronization preamble,
PIP, its complement, correct bit-stuffing and CRC-5 respective CRC-16 bits in all this cases.

An independent USB Monitor monitors all bus activities and logs the result on the screen and in a
Result.out file.

This monitor detects all USB FS Token, Data and Handshake commands It also adds direction information to distinguish if the commands are initialized from the USB host or the USB device under test.
Documentation will be found in the DOWNLOAD section (USB FS TestBench.pdf).