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Details
Category: DSP Core
Created: Apr 22, 2018
Updated: Jan 27, 2020
Language: Verilog
Other project properties
Development Status: Alpha
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
Integer streaming FFT fixed size and resizable.
Language - SystemVerilog.
Generator of rotation coefficients in MatLab.
Includes Quartus project (IntelFPGA).
