Efficient Hardware Looping Unit

Efficient Hardware Looping Unit


Category: Uncategorized

Created: April 16, 2004

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Stable

Additional info: Design done

WishBone compliant: No

WishBone version: n/a

License: GPL


Hardware looping unit

Tha main purpose of the hardware looping unit (HWLU) is to enhance program control units found in modern microprocessors, by efficiently handling loop increments and branches in nested loop structures. It is based on recently published work (details can be found in the specification document). The main advantage of the presented architecture is that successive last iterations of nested loops are performed in a single cycle. This architecture can be useful in the case that all data processing in context of a nested loop structure is performed in the inner loop, which is rather often in multidimensional signal processing applications as performance-critical code in image coding and video compression standards.


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