Open Hitter for Traded Options and Futures

Open Hitter for Traded Options and Futures

Details

Category: Uncategorized

Created: April 19, 2015

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Planning

WishBone compliant: No

WishBone version: n/a

License: LGPL

Description

This project will provide a working demonstration project for developers new to fpga. The core 'hitter' is a component that listens to network traffic including configuration instructions and exchange data, and will launch a trading order back onto the network for profitable opportunities.

Trading latency should be negative in traditional terms (ie the first bits of the trading order packet are on the network before the last bits of the exchange data packets have arrived). The internal time for processing including order lookup will be around forty nanoseconds. Note that a key benefit of the fpga medium is that your code is integrated with the network interface which saves around a millisecond compared to even awesome NICs.

Technology application: project will provide 1GHz / ML605, but the implementation isn't speed limited and 10GHz / Virtex should an be easy build. Although some compliance functions are already included (eg quantiy and price limits), you should make your own compliance assessment including but not limited to a control and reporting array addressed via integrated SOC.


Current Build Status

You can download the code and run the test cases using ghdl or with some experience you can integrate the code into a Xilinx ML605 project and see the test case results via the board's LEDs (no instructions are provided for this, but on-hardware testing on ML605 is confirmed).

In the current source code, incoming exchange data and instructions take the form of some pre-canned fields, as if already parsed from network packets. The outgoing trading orders are likewise data fields as if just before integration into a network packet.


Ownership

Thanks open cores! The project started small and online to incrementally track IP added and clearly open ownership. The licence offered is the non-viral LGPL to encourage copying, and to encourage non-proprietary feedback specifying price/data field structures that can make the project more useful.


References

Above: GHDL is an open-source simulator for the VHDL language 'where VHDL meets gcc': http://ghdl.free.fr