Agile Analog Accelerates IoT Design with New Analog IP

October 24, 2022 by Aaron Carman

Agile Analog's Foundation IP consists of basic analog building blocks to enable faster IoT design without requiring a custom in-house design.

Agile Analog, a Cambridge-based analog IP company, recently completed a set of key analog IP to assist with IoT design. Despite the prominence of digital technologies in the IoT world, analog circuits are still a major requirement for high-performance chip design. With the release of Agile’s Foundation IP, designers may implement analog building blocks within their designs to match their requirements and ensure optimal performance.


Agile Analog’s intended use case

Agile Analog’s intended use case: integration of Agile IP with custom IP to achieve an optimal solution without requiring a complex custom analog design. Image used courtesy of Agile Analog


In this article, we'll discuss Agile Analog’s approach to analog IP and the unique qualities of their Foundation IP. In addition, this article will also examine the roles and impacts of the newly released building blocks within a larger IoT design ecosystem.


It’s a Digital World; Analog Is Just Living in It

The global impact of digital electronics is immeasurable. From solving differential equations to securely encoding messages, digital electronics are largely responsible for everyday computing as we know it. Despite this, analog electronics are integral to many systems.

Even the simplest digital chips require some power conditioning to ensure proper voltages are applied to the power rails. As digital circuits become more complex, more analog functions are required, such as low-noise amplifiers (LNAs), data converters, oscillators, and many more.


Composa methodology design flow

Composa methodology design flow. After providing process information, design requirements, and current solutions, Agile Analog may produce high-performance analog circuits. Image used courtesy of Agile Analog


Agile Analog’s goals are simple: provide designers with improved analog circuits while making integration for ASICs or SoCs easier. Using Agile’s Composa technology, designers are no longer limited to the IP available for their process of choice. Instead, the Composa methodology takes the chosen PDK as an input to develop the required analog deliverables, making the IP a multi-process solution.


Setting the Foundation for IoT Design

Knowing that analog design is not a large focus of an IoT designer, Agile Analog has set out to make the analog design process as easy as possible with its Foundation IP. The Foundation IP consists of six blocks:

  • SoC/ASIC Protection
  • Sensor Interface
  • Always On Block
  • IC Health Monitoring
  • Power
  • Radio Interface

Using the blocks, designers can abstract the analog design process and simply work with building blocks to accomplish the desired analog function.


Agile Analog’s Foundation IP

Agile Analog’s Foundation IP with each block’s components explained in further detail. Image used courtesy of Agile Analog


After settling on a process node, Agile Analog’s Foundation IP may be used to generate high-performance analog circuits without an in-house hands-on design process. This allows IoT designers to focus on their own innovations and use Agile’s IP to fill in the blanks for analog design. It also helps to meet tapeout deadlines, improve time to market, and yield final chips that work as designed—helping to save on overall costs.


Analog Efficiency in Digital Systems

Agile’s Foundation IP is not a sign that the field of analog electronics is stagnating but rather a response to a relatively complicated design process when compared to digital electronics. Analog electronics are still undergoing innovation, but not all designers need these innovations.

Those who need known analog circuits but do not wish to go through the design process can make good use of Agile’s IP, helping to accelerate IoT developments and improve analog efficiencies in digital systems.