Breakthrough in Nanoimprint Lithography Could Revolutionize Flexible Semiconductors
Collaborative efforts from UW Madison and partnering Universities have developed a new technique to create low cost, high power flexible semiconductors.
High-performance transistors with a nanotrench structure could lead to breakthroughs in flexible electronics.
Nanoimprint Lithography (NIL) is a technique used to create patterns on the nanometer scale. It is a process that falls under the broad spectrum of nanolithography but with a high output, resolution, and low cost. NIL mechanically deforms imprint resists along with a few other converging processes to create patterns along a template. As of 2015, nanolithography has become a very active area of research in industry as well as academics; with applications in biological, electrical, photonics, and optics fabrications.
The simplification of manufacturing techniques for expansive and flexible radio-frequency devices has become a covetable area of interest for flexible electronics. There have existed numerous challenges to nanoscale patterning, however, the recent advances in NIL have opened a new spectrum of radio frequency applications.
Researchers from the University of Wisconsin-Madison and partnering research institutes have managed to devise a new development in flexible Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). With broad applications of these transistors, the new development could possibly have implications in flexible sensors and wearable electronics.
The majority of flexible electronics do not require devices that can sustain high speeds, so the area of focus has tended to focus on the flexibility of the device. Generally, the low-speed flexible electronics rely on organic or metal oxide components and are manufactured by using various coating, printing, and deposition processes. The breakthrough has applications in high-speed radio frequency flexible transistors, which can theoretically operate at speeds well over 100GHz. This is substantial in the regard that it allows flexible electronics to operate under lower power consumption, transmit data wirelessly, and even wirelessly transfer power.
There arose two main challenges while attempting to design the new MOSFETs. The first challenge was to find a material that could not only maintain mechanical flexibility but remain sufficiently mobile at the same time. The second challenge was the ability to define a channel region using a scalable design process. There have been various attempts to find suitable materials that could fit the mechanical requirements of a flexible and moveable structure, and some solutions have been found regarding this issue. Single crystalline structures such as the SrRuO3 (Chemical notation, or can use Silicon nanomembranes in place of SrRuO3 for simplicity) have managed to solve the first issue, however, conventional lithography techniques such as photolithography has encountered issues during fabrication i.e. light diffraction and constraints of thermal plasticity under essential temperatures as well as controlling the doping uniformly enough to produce efficient current flow without short circuit risk.
Normally MOSFETs are created by coating silicon dioxide onto a preexisting layer of silicon substrate and then placing metal or crystal aggregate silicon on top. The current techniques used to create the MOSFETs tend to be imprecise and not very uniform; this causes the doping to leak into undesirable areas causing the short channel effect (PDF), which simply put, causes the channels to decrease in size and create disconformity across the MOSFETs released to the market.
A diagram of the nanotrench structure. Courtesy of Nature.com
This is where UW Madison and partnering research universities come into play. In order to improve the semiconductor quality, they targeted reducing the doping leakage by using a process of electron-beam lithography. In detail, the team coated a template with a silicon layer 270nm thick, subsequently the team used electron-beam lithography to cut trenches, and then used dry etching to create a membrane from the silicon. The nanoscale membrane was then removed and placed onto a polyethylene terephthalate substrate (PET) film. The final steps involved more dry etching and placing the gate dielectric layers and metal gate.
A diagram of UW Madison's production process. Courtesy of Nature.com
Currently, the smallest length of a channel in a plastic flexible transistor is 1 micrometer. UW Madison and partners' research team has been able to fabricate channel lengths of 50 nanometers. This is significant due to the fact that we can now pack more of these components/channels into devices of the same size, not only increasing power but efficiency as well!
Flexible semiconductors are by no means are a new invention; however this breakthrough has industry implications in the manufacturing of high-performance and low-cost semiconductors. The researchers believe that it can be used to manufacture large rolls of semiconductors on plastic sheets; leading to mass production of more powerful components at a reduced cost.
You can find the collaboration of research here.