Highlights of Intel’s 2021 Architecture Day—a Computing-centric Event

August 24, 2021 by Jake Hertz

At Intel's 2021 Architecture Day, CEO Pat Gelsinger called the company's new computing technology "magic." Here are a few highlights from the event.

The past couple of years have been hard on Intel—what with its 7nm process months behind schedule, TSMC taking over select CPU production, and Apple's departure from Intel silicon. However, earlier this year, the company announced its forward-looking roadmap, including a detailed plan of how the company planned to regain its prominence in the marketplace. 

Following the trajectory of this roadmap, Intel recently released a slew of new announcements during its third annual Intel Architecture Day. The goal of these announcements, Intel CEO Pat Gelsinger explains, is to meet the daunting demands of computing through innovative platforms and architectures.


Raja Koduri

Intel's Raja Koduri presents a wafer with Intel Arc high-performance discrete graphics hardware. Image used courtesy of Intel

"Our talented architects and engineers made possible all this technology magic," he explains.

In this article, we’ll take a high-level look at the new hardware from Intel, including new CPUs, IPUs, and the Ponte Vecchio SoC


New x86 Cores

One of the biggest announcements from Intel Architecture Day was the release of two new x86 core types for its Alder Lake 12th Generation. 



The first is called the "Efficient-core:" an x86 microarchitecture that is designed for power-aware computing in mobile and IoT applications. According to the company, Efficient-core is able to enhance performance while minimizing power consumption thanks to a number of technical advances.

These include: 

  • 5,000 entry branch target cache for more accurate branch prediction
  • 64-kilobyte instruction cache to minimize data movement energy
  • On-demand instruction length decoder
  • Clustered out-of-order decoder capable of decoding up to six instructions per cycle

Compared with Skylake, the Efficient-core achieves 40 percent more performance at the same power for single-threaded performance.



The second x86 core is the Performance-core, Intel’s highest-performing CPU yet. This x86 microarchitecture is designed for speed and low latency in single-threaded applications, leveraging several technological advances.



Diagram of Intel’s Performance-core. Image used courtesy of Intel


Among these advances are more decoders, µop cache, allocation, and execution ports than 11th Gen cores. The Performance-core also offers bigger physical register files, improved branch prediction accuracy, more exposure to parallelism, and reduced effective L1 latency. Compared to the 11th generation, this new core improves performance by ~19 percent across a wide range of workloads. 


Intel's First ASIC IPU and Its "Most Complex SoC" 

Intel released much more than just new x86 cores at this year's Architecture Day. Other releases included new infrastructure processing unit (IPU) architectures: Mount Evans and Oak Springs Canyon.

Mount Evans is Intel’s first ASIC IPU designed to reduce overhead for cloud and communication service providers and free up performance for central processing units. Oak Springs Canyon is an FPGA-based IPU intended to allow cloud providers the ability to offload tasks from their CPUs to IPUs.

Intel also announced Ponte Vecchio—what the company is calling its most complex SoC ever. Leveraging advanced semiconductor processes, the device integrates over 100 billion transistors.


Ponte Vecchio SoC

Intel’s Ponte Vecchio SoC integrates over 100 billion transistors. Image used courtesy of Intel


Intel claims the SoC provides:

  • >45 TFLOPS FP32 throughput
  • >5 TBps Memory Fabric bandwidth
  • >2 TBps connectivity bandwidth


Other Mentionable SoCs

While this article only highlights a few announcements from Intel's 2021 Architecture Day, the company revealed several other hardware innovations, including two intelligent SoCs, the 12th-generation Alder Lake and XHPG/Alchemist SoCs.

Alder Lake combines both Efficient-cores and Performance cores (along with I/O and memory) while the Xe HPG and Alchemist SoCs use a discrete graphics microarchitecture for gaming applications.


The building blocks of Alder Lake

The building blocks of Alder Lake. Image used courtesy of Intel

Another announcement worth noting is Sapphire Rapids, a data center processor that taps the Performance-cores along with new accelerator engines. In an opinion editorial from Intel's Raja Koduri (senior VP and general manager of the Accelerated Computing Systems and Graphics Group), Koduri explains: 

"At the heart of Sapphire Rapids is a tiled, modular SoC architecture that delivers significant scalability while still maintaining the benefits of a monolithic CPU interface thanks to Intel’s EMIB multi-die interconnect packaging technology and advanced mesh architecture."

Until this new hardware becomes available, Intel offers demos and toolkits for developers to review.



Throughout your career, how have you seen hardware evolve to accommodate increasingly demanding computing applications? Share your thoughts in the comments below.