ISSCC Papers from Renesas Tackle Wireless Charging and Car Gateway SoCs

Last week, IEEE held its 2023 International Solid-State Circuits Conference (ISSCC). Achieving the milestone of 70 years, this event was chock full of presentations and technical papers focused on advances in solid-state circuits and systems-on-chips (SoCs).

Among the interesting papers presented at ISSCC were two from Renesas Electronics, one on a single-chip wireless power transmitter for wireless charging and the other on technology for automotive communication gateway SoCs.

In this article, we’ll examine the key innovations described in these ISSCC papers, and put them into context for today’s system designs.

 

Single-chip Wireless Power Transmitter

In its ISSCC paper entitled “Single-Chip Qi-Compliant 40W Wireless-Power-Transmission Controller using RMS Coil Current Sensing and Adaptive ZVS for 4dB EMI and up to 1.7% Efficiency Improvements,” Renesas engineers described a single-chip wireless power transmitter.

 

Block diagram and technical features of Renesas’ single-chip Qi-compliant power transmission controller. Image used courtesy of ISSCC. (Click image to enlarge)

 

The device measures AC and DC transmitter power for improved accuracy and safety. In the presentation, the team delved into the details of a transmitter technology with adaptive Zero-Voltage Switching (ZVS) with reduced electromagnetic interference (EMI) and higher power transmission efficiency. Renesas says these capabilities allow wireless power transmission up to 15 W with a Qi power receiver (PRx) and up to 40 W with proprietary PRx implementations.

With this technology, Renesas claims it is first in the industry to develop single-chip transmitter technology that can directly measure both DC and AC power transmission components. In this way, transmitted power can be measured more accurately, providing a means to accurately detect a mismatch between the PTx and the PRx power level, says the company.

 

High-power Capability and Adaptive ZVS

As shown in the table below, the Reneas design is compared to state-of-the-art commercial products. Aside from STMicroelectronics’ 15 W device, the other chips are limited to 5 W, while Renesas offers 40 W. Without adaptive ZVS, the other explanations can’t measure AC power losses.

Importantly, the Renesas chip can also deal with up to four coils using five half bridge inverters. Moreover, the device integrates PRx position sensing to improve spatial placement freedom and voltage/current/phase ASK (amplitude shift keying) demodulation.

 

Renesas single-chip Qi-compliant wireless transmitter compared to other industry devices (top). Power efficiency shown in package thermal scans (bottom). Image used courtesy of ISSCC. (Click image to enlarge)

 

As shown in the package thermal scans up to 40 W in the image above, the Renesas device maintains efficiency under 41°C. The chip is manufactured in a 0.18 μm BCD process with a die size of 15.6 mm2 {SSCRIPT}. In terms of Wireless Power Consortium (WPC) standards, the company says it is compliant with the WPC-1.2.4 specification and is also fully compliant with WPC 1.3+ when paired with an external security IC.

Renesas says that the technical enhancements discussed in the ISSCC paper have been applied to some of Renesas’ wireless power transmitter ICs that are available now.

 

Moving to Communications-oriented Automotive Gateways

Renesas’ other ISSCC paper this year, entitled “A 33kDMIPS 6.4W Vehicle Communication Gateway Processor Achieving 10Gbps/W Network Routing, 40ms CAN Bus Start-Up and 1.4mW Standby Power,'' describes how automotive E/E(electrical/electronic) architectures are shifting away from a Central Gateway (CeGW) Architecture approach to a Communication Gateway (CoGW) Architecture. The paper concludes with a proposed GoGW chip implementation.

 

The Reneas ISSCC paper describes a future Communication Gateway (CoGW) Architecture built to tightly connect all key automotive systems. Image used courtesy of ISSCC

 

As explained in the paper, CoGW requires cloud services with connected cars. This occurs in conjunction with the communication between local automotives ECUs in a CeGW system. These new CoGW’s demand multi-giga-bit Ethernet communications and 30k DMIPS application processing.

Performance issues get tricky too because Control Area Network (CAN) start-up times are needed at less than 50 ms for car control, while also running at under 2 mW standby power to save battery power. Meanwhile, such connected systems have to deal with the cyberattacks, such as spoofing of cloud services.

 

A Single-chip CoGW Processor Implementation

With all that in mind, the CoGW processor must achieve all those requirements while avoiding any safety and security risks, says the paper. Because car services like software updates happen over the air (OTA), these challenges are especially critical.

 

Shown here is the micrograph of the test chip crafted by the Renesas paper’s authors. The device is fabricated in one chip in 12 nm CMOS. Image used courtesy of ISSCC

 

To meet all these demands, two different subsystems—the sub-system for traditional CeGW (control domain) and the sub-system for high performance application (application domain)—are integrated onto one die, the paper explains. This has three key benefits:

1. To optimize power by being aware of the operation mode by on-chip precise control.
2. To minimize the risk of security by on-chip closed communication.
3. To reduce multi-chip communication overhead between different domains (protocols) by on-chip tight interconnection.

 

According to Renesas, the technologies showcased in its teams’ CoGW ISSCC paper have been leveraged into Renesas’ R-Car S4 vehicle communication gateway SoC.