NeuralTree SoC Detects and Blocks Symptoms of Neurologic Disorders

February 01, 2023 by Jake Hertz

With NeuralTree, EPFL researchers are vaulting traditional challenges of implantable SoCs, like low channel count, system complexity, and large area.

A concept once strictly existing in science fiction, brain-implanted chips, like Elon Musk's Neuralink, are now receiving real-world investment. While still far off from use in humans, this technology holds the potential to revolutionize neurology and positively impact many lives.

This week, researchers from the EPFL (the Swiss Federal Institute of Technology Lausanne) announced a new neuro-chip that may detect and prevent symptoms from certain neurologic disorders.


EPFL researchers have developed a low-power chip design

EPFL researchers have developed a low-power chip design that combines ML algorithms and soft implantable electrodes to identify and suppress symptoms of various neurological disorders. Image courtesy of Alain Herzog and EPFL


In this article, we’ll look at how EPFL's research addresses some of the hardware challenges facing implantable chips.


Challenges Facing Implanted SoCs

One of the challenges of implantable SoCs is that most proposed solutions have a low channel count. In general, the analog front-end of an SoC, which consists of signal conditioning hardware such as filters and amplifiers, requires a significant amount of area. Because brain-implantable hardware is space limited, there is a significant tradeoff between area and functionality. As a result, many machine-learning SoCs tend to be limited to 8-32 channels. Researchers argue that this number of channels is insufficient to collect meaningful biological data.

Beyond channel count concerns, many proposed machine learning SoCs for biological applications are not efficient. The hardware complexity of the SoC grows proportionally to the number of channels and biomarkers being tracked. Most architectures reach a point of diminishing returns in terms of adding channels, where eventually, the complexity of the hardware outweighs the benefits of adding more channels. Because of this, it’s exceptionally difficult to scale these SoCs, which is another reason why channel counts remain so low.

For future SoCs to provide any real value in healthcare, these issues must first be addressed.


NeuralTree Detects and Cancels Neurologic Symptoms

EPFL recently published a paper introducing its new SoC, NeuralTree. Labeled a “256-Channel 0.227µJ/class Versatile Neural Activity Classification and Closed-Loop Neuromodulation SoC”, NeuralTree has potential in the brain-implantable hardware space, the team asserts.


NeuralTree front-end architecture

NeuralTree front-end architecture. Image courtesy of arXiv


The chip leverages a unique front-end architecture, which helps it overcome scalability issues and adds a high channel count to the SoC. EPFL's paper describes the chip as having a spatially-efficient time-division multiplexed (TDM) front-end, consisting of a two-step fast-settling mixed-signal DC servo loop (DSL). The result is that the chip can fit 256 channels arranged in a 16×16 switch matrix in an impressively small chip area of 3.48mm2.

The device uses machine learning and signal processing on brain-wave-based biomarkers to understand neural activity. If a neurologic response like a parkinsonian tremor or an epileptic seizure occurs, the chip can detect it. Further, the chip can prevent an impending neurologic symptom by generating an opposing signal in the brain to effectively cancel out the symptom. 

The team's research resulted in a working SoC that achieves an 8× improvement in channel count, 9.3× in per-channel area, and 4.3× in system energy efficiency.

In the future, EPFL researchers hope to update on-chip algorithms to keep up with evolving neural signals.