New CVD Technology Allows Smaller Chip Packaging for SoCs and SiPs
A new breakthrough in the chemical vapor deposition process could allow smaller chip packaging.
Nanomaterials have lost some popularity when it comes to chip fabrication. But a new chemical vapor deposition process could reopen that door and allow for smaller chips.
Smaller Packaging through SoCs and SiPs
Since the emergence of nanotechnology in the 1980s, research and experimental advances have converged on the idea of making components smaller. Most research, even today, has been focused on the concept of creating things such as smaller semiconductors and transistors.
This conceptualization has been extremely lucrative in terms of scientific advancement, whether it be creating components with dimensions in the single nanometer range or the developing ability to manipulate matter at the level of single atoms. But, recently, focus has somewhat shifted to the ability to package these tiny materials together. This is due to recent developments in system-on-chip (SoC) and systems-in-packages (SiP) technologies.
Representation of a PSOC or programmable system-on-chip. Image courtesy of Mouser Electronics.
SoCs are essentially the idea that an integrated circuit should be used to integrate all components of an electronic system into a single chip. They can be seen in common devices such as smartphones and Raspberry Pis. Systems in packages are quite similar except they use multiple integrated circuits bound together into a single package. This deviation from smaller components could potentially broaden the development of nanomaterials in research and manufacturing.
CVD and the Smoltek Tiger
Smoltek AB, a Swedish company from Gothenburg has been utilizing the state-of-the-art research laboratory at Chalmers University to develop new SoC and SiP technologies to create a new frontier in chip packaging and nanotechnology.
The company has made use of their proprietary technology to spearhead the new movement with a deviation on chemical vapor deposition simply nicknamed the Smoltek Tiger (PDF).
CVD is a process used to create high-quality solid materials, and is regularly used to manufacture thin films on metal substrates for semiconductors. The process is quite versatile as it allows a substrate to have a controlled growth by varying material quantity and introduction time. As the CVD process becomes more precise, it will allow the resulting growth to become higher quality. This is exactly where Smoltek’s advances come into the spotlight, as their business and patents' focal points are predicated on this technology.
The CVD process that Smoltek uses deviates from similar processes by adding two additional layers to the CVD process. The first layer added is another control layer which regulates the growth of specific nanostructures.
Image courtesy of Smoltek (PDF).
The second layer is known as a "help layer" which prevents the underlying surface from being damaged by materials used during CVD growth. A key component of their method of CVD is that it functions at temperatures less than 400 degrees Celsius, allowing the process to accommodate CMOS components.
Here is a video of Smoltek CEO Anders Johannson outlining the company and CVD process:
Nanomaterials vs Macroscopic Materials
Unfortunately, nanomaterials have a bad reputation in the chip industry as nanomaterial components tend to have properties that disrupt specific processes such as current density. This has driven manufacturers in the chip industry to rely on macroscopic materials, and has caused disinterest in exploring nanomaterial substitutes and development. However, there has been recent interest in exploring the nanomaterial market due to new developments like that of the Smoltek Tiger.
Moore’s law is definitely going to slow down and our current silicon technologies probably won’t last another five years. This has recently caused great amount of interest being shown in the SoC and SiP markets due to silicon material restrictions. The space that has been freed up by creating smaller components and chip dimensions could be used to add additional device features, which is where Smoltek sees potential. The technology will most likely be used in SiP products while providing better performance at a smaller size and requiring less energy.