Open Source RISC-V Architecture Makes Strides Towards Customizable SoCs

The RISC-V footprint is expanding with the commercial availability of open-source chips and related development boards from silicon startups like SiFive and OnChip.

The open-source hardware movement's journey from academia to the commercial realm is finally gaining some momentum. This is in large part thanks to free RISC-V instruction set architecture (ISA), which was developed at the University of California, Berkeley a few years ago.

 

Customizable RISC-V SoCs

Take SiFive, a startup founded by RISC-V pioneers, which has unveiled the Freedom Everywhere 310 system-on-chip (SoC)—also known as the FE310—at the fifth annual RISC-V workshop being held at the Google Campus on November 28, 2016.

The SoC is based on the RISC-V open architecture and allows developers to create custom silicon solutions according to their particular design needs.

 

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The FE310 open-source chip is at the heart of SiFive's Arduino board. Image courtesy of SiFive.

The open-source chip—a microcontroller for embedded and Internet of Things (IoT) applications—comes along with a $59 HiFive1 development board that SiFive claims will allow design engineers to develop their own custom silicon on top of the FE310 design base. The San Francisco, California–based firm says that the Arduino-compatible board will be available for shipping on Crowd Supply in February 2017.

What's also notable in this launch is the fact that SiFive has put the RTL files online for the SoC design, and the free availability of the source code of a chip is quite unusual in the silicon industry. SiFive claims that the RTL code will empower chip designers and small system houses to customize their own SoC design solution on top of the base FE310 chip.

The RTL code files of FE310 microcontroller chip can be accessed at https://github.com/sifive/freedom.

 

Expanding the RISC-V Ecosystem

Another notable development around the RISC-V ecosystem came from SiFive's design partner Microsemi, which has made available a soft IP core based on the open RISC-V architecture. The FPGA supplier claims that the related software tool chain is portable to all chips using the RISC-V processor core.

It's worth noting that SiFive is also offering soft IP cores based on the RISC-V instruction set; its Coreplex family of processor cores span from high-performance 64-bit Unix-capable multicore processors to 32-bit embedded microcontrollers. Then, there is OnChip, a startup from the Universidad Industrial de Santander in Colombia, which has unveiled mRISC-V, an open 32-bit microcontroller based on the RISC-V architecture.

OnChip—founded by a group of doctoral students—is targeting its Open-V microcontroller at IoT applications and is aiming to offer performance similar to the ARM Cortex-M0 microcontrollers.

 

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The bare die of Open-V microcontroller based on the free RISC-V instruction set. Image courtesy of OnChip.

The open-source chip comes packed with peripherals such as SPI, GPIO module, ADC, and DAC. OnChip has launched a crowdsourcing campaign to manufacture this open-source chip at TSMC's 130nm process. The firm has also made available a number development boards built around this open-source chip on Crowd Supply.

 

Featured image used courtesy of SiFive.