Weebit Nano Secures $40 Million to Accelerate ReRAM Development
With new capital, Weebit Nano is poised to continue development of ReRAM for improved memory technology.
Further enabling the rollout of its resistive RAM (ReRAM) technology, Weebit Nano has announced that it has secured $40 million in its most recent round of fundraising. This announcement comes soon after the availability of ReRAM IP in SkyWater Technology’s 130 nm process and is expected to further fund the development of ReRAM and its integration into new modules.
ReRAM cells are integrated into the metal layers of the SkyWater S130 process, allowing for increased versatility and improved area usage compared to flash memory. Image used courtesy of Weebit Nano
ReRAM as a technology has several key advantages compared to other nonvolatile memory (NVM) technologies, including speed and write endurance. This makes it well suited for several applications and gives designers a new tool that they can use to continue to innovate.
This article gives an overview of ReRAM technology to give readers a basic understanding of its performance as NVM, in addition to the implications of the successful funding run and what it could spell for the future of the engineering world.
Weebit’s ReRAM works quite similarly to currently researched compute-in-memory architectures, in that the material’s resistance can be changed programmatically. This allows for rapid and robust memory that can be accessed by simply measuring the resistance of the cell. In addition, since the material properties themselves are being modified, a loss of power doesn’t mean a loss in data, providing critical nonvolatility.
Weebit’s ReRAM leverages materials that will change resistance based on a set/reset voltage. This allows for memory to be deployed using the material. Image used courtesy of Weebit Nano
The reduced reliance on transistors allows the ReRAM cells to be integrated with the back-end-of-line, giving designers more versatility. The improved scalability of ReRAM and the current availability may also make it a desirable solution for chiplet systems, where a dense memory module may be used alongside other chiplets for a fast and efficient memory solution.
Room to Shrink
While the raw performance boost provided by ReRAM may not be needed by some designers, engineers as a whole are poised to benefit from the improved scalability. As NVMs like flash will eventually reach a lower limit on size, ReRAM has more room to shrink, allowing denser memory modules alongside improved memory performance.
ReRAM Smart Modules can be implemented as part of a larger SoC, giving designers enhanced flexibility when integrating ReRAM into their projects. Image used courtesy of Weebit Nano
Despite their relatively young partnership, SkyWater’s S130 process has already allowed Weebit’s ReRAM to be integrated into a 256 Kbit module, with customization options up to 2 Mbit. In addition, in order to make the job of the designer easier, Weebit and SkyWater have begun work on a ReRAM compiler, removing the manual design requirements in order to integrate ReRAM in custom designs.
The move to ReRAM may prove to show its benefits rather quickly as it is now available as part of SkyWater’s S130 process. Once an updated PDK is released, designers can begin incorporating ReRAM into custom chip designs, or leveraging the improved performance with existing chiplets for new SoCs.
New Age of Memory
While flash isn’t expected to disappear from the market entirely, the availability of new memory technology is certainly beneficial to all designers, not just those who design custom chips. As ReRAM becomes more widely adopted, its benefits versus legacy technologies can be compared in realistic scenarios to see the true scope of the benefits and tradeoffs behind ReRAM.
ReRAM arrays can be rapidly deployed thanks to IP generated by Weebit, giving designers a headstart on incorporating ReRAM into their custom circuits. Image used courtesy of Weebit Nano
Weebit has already targeted several applications outside those mentioned here, including aerospace and defense (due to the improved radiation performance), IoT (due to power efficiency), and security (as the ReRAM is “hidden” from bad actors). And while edge AI is listed as well, it will be interesting to see if the ReRAM can be repurposed to accomplish any compute-in-memory functionalities while maintaining the advertised memory performance. Perhaps, even the von Neumann bottleneck may be pushed back thanks to the improved access times.
As is generally the case with cutting-edge tech, time will be the ultimate test for ReRAM. If its performance can truly match what is promised, then the engineering design world may be in for a major shakeup, where compute and memory performances experience rapid and beneficial developments enabled by ReRAM.