All About Circuits

Digital Circuits

Timer Circuits


18 questions By Tony R. Kuphaldt

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  • Question 1 of 18

    Don’t just sit there! Build something!!


    Learning to analyze digital circuits requires much study and practice. Typically, students practice by working through lots of sample problems and checking their answers against those provided by the textbook or the instructor. While this is good, there is a much better way.

    You will learn much more by actually building and analyzing real circuits, letting your test equipment provide the “answers” instead of a book or another person. For successful circuit-building exercises, follow these steps:

    1. Draw the schematic diagram for the digital circuit to be analyzed.
    2. Carefully build this circuit on a breadboard or other convenient medium.
    3. Check the accuracy of the circuit’s construction, following each wire to each connection point, and verifying these elements one-by-one on the diagram.
    4. Analyze the circuit, determining all output logic states for given input conditions.
    5. Carefully measure those logic states, to verify the accuracy of your analysis.
    6. If there are any errors, carefully check your circuit’s construction against the diagram, then carefully re-analyze the circuit and re-measure.

    Always be sure that the power supply voltage levels are within specification for the logic circuits you plan to use. If TTL, the power supply must be a 5-volt regulated supply, adjusted to a value as close to 5.0 volts DC as possible.

    One way you can save time and reduce the possibility of error is to begin with a very simple circuit and incrementally add components to increase its complexity after each analysis, rather than building a whole new circuit for each practice problem. Another time-saving technique is to re-use the same components in a variety of different circuit configurations. This way, you won’t have to measure any component’s value more than once.

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  • Question 2 of 18

    The following schematic diagram shows a timer circuit made from a UJT and an SCR:





    Together, the combination of R1, C1, R2, R3, and Q1 form a relaxation oscillator, which outputs a square wave signal. Explain how a square wave oscillation is able to perform a simple time-delay for the load, where the load energizes a certain time after the toggle switch is closed. Also explain the purpose of the RC network formed by C2 and R4.

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  • Question 3 of 18

    The model “555” integrated circuit is a very popular and useful “chip” used for timing purposes in electronic circuits. The basis for this circuit’s timing function is a resistor-capacitor (RC) network:





    In this configuration, the “555” chip acts as an oscillator: switching back and forth between “high” (full voltage) and “low” (no voltage) output states. The time duration of one of these states is set by the charging action of the capacitor, through both resistors (R1 and R2 in series). The other state’s time duration is set by the capacitor discharging through one resistor (R2):





    Obviously, the charging time constant must be τcharge = (R1 + R2)C, while the discharging time constant is τdischarge = R2C. In each of the states, the capacitor is either charging or discharging 50% of the way between its starting and final values (by virtue of how the 555 chip operates), so we know the expression e[(−t)/(τ)] = 0.5, or 50 percent.

    Develop two equations for predicting the “charge” time and “discharge” time of this 555 timer circuit, so that anyone designing such a circuit for specific time delays will know what resistor and capacitor values to use.


    Footnotes:


    For those who must know why, the 555 timer in this configuration is designed to keep the capacitor voltage cycling between 1/3 of the supply voltage and 2/3 of the supply voltage. So, when the capacitor is charging from 1/3VCC to its (final) value of full supply voltage (VCC), having this charge cycle interrupted at 2/3VCC by the 555 chip constitutes charging to the half-way point, since 2/3 of half-way between 1/3 and 1. When discharging, the capacitor starts at 2/3VCC and is interrupted at 1/3VCC, which again constitutes 50% of the way from where it started to where it was (ultimately) headed
    .

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