SPI Slave Wishbone Master Controller
Details
Category: Communication Controller
Created: July 21, 2018
Updated: January 27, 2020
Language: VHDL
Other project properties
WishBone compliant: Yes
WishBone version: B.4
License: LGPL
Description
If a FPGA or CPLD needs to be coupled to a microcontroller often a fast interface is needed. Many controllers do not provide an external address/data bus. Even if, this would require many wires and pins at both parts. Alternatively we can use one of the standard serial peripherals such as
| Bus type | typical max. baud rate | needed pins |
|---|---|---|
| SPI | 15..30 Mbit/s | 4 |
| I2C | often: 400 kbit/s sometimes: 1 Mbit/s seldom:3 Mbit/s |
2 |
| UART | 5 Mbit/s | 2 |
| SD/MMC | 12/25/48MHz @ 1/4/8 datalines |
3/6/10 |
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