Wire-Frame 3D Graphics Rendering Accelerator IP Core

Wire-Frame 3D Graphics Rendering Accelerator IP Core


Category: Video Controller

Created: September 30, 2015

Updated: January 27, 2020

Language: Verilog

Other project properties

Development Status: Stable

Additional info: Design done, FPGA proven

WishBone compliant: Yes

WishBone version: n/a

License: BSD


WF3D is a real-time 3D graphics rendering IP Core.

The IP Core reads 3D triangle vertices from memory, then transforms them into 2D space,
and writes 2D triangle’s edge line to memory. Note that this IP Core only supports Wire-Frame 3D graphics.

In other words, the IP Core does not have traditional 3D graphics rendering features,
such as polygon filling, texture mapping, lighting, etc.

Instead of lacking these features, this IP Core has several advantages,
such as small logic consumption and low-bandwidth memory access.