The FPGA market is projected to be worth nearly $10 billion by 2023. This is almost certainly why Intel acquired FPGA giant Altera in 2016 for $16.7 billion. The gamble was partially based on the expectation that, by 2020m the growing demand for cloud computing would rely increasingly on FPGAs.
Since the acquisition, Intel has used its new FPGA branch to focus on developing solutions for machine learning, encryption, big data processing, cloud computing, and accelerated computing with the reprogrammable hardware.
Recently, the company also announced a new line of CPU-FPGA hybrid chips for more flexible and powerful applications. While this particular duo is not entirely a new concept, it is a continuation of some of Intel’s ambitions to hybridize since 2010. Also available is a software stack to make working with the hardware much easier, whether it is being used for application development or acceleration development.
An Intel CPU and a rendering of an Intel FPGA. Images courtesy of Intel.
Skylake CPU paired with the Arria 10 FPGA
The benefit of combining both FPGAs and CPUs in the same package is that you get the best of both worlds when it comes to x86 architecture for general computing and the customizable and flexible programming with FPGAs. In addition, higher-bandwidth and lower latency between the CPU, FPGA, and shared resources such as the cache and system memory are also achieved with this combined hardware configuration. Computation can be in-line (it goes through the CPU before being offloaded to the FPGA) or can be sent directly to the FPGA, with results returned to the CPU.
Intel will be using a to-be-announced Skylake CPU paired with and Arria 10 FPGA on a proprietary UltraPath Interconnect (UPI) link—capable of 9.6GT/s or 10.4GT/S data transfer rates.
The Arria 10 FPGA. Image courtesy of Intel.
This hybridization isn’t exactly new, nor is it Intel’s first crack at it—in 2010 Intel combined its Atom processor with the Altera’s Arria II FPGA to create the E600C hybrid. The FPGA portion of E600C was programmed using the Quartus II programming environment, and x86 development tools available at the time could be used for the Atom processor. The E600C was meant to be a low-powered, customizable solution with a particular target for in-car entertainment systems and smart grids.
In 2014, another hybrid was announced although there were few details available other than it paired a Xeon processor with an FPGA and was made available to some of Intel’s larger customers in early 2016.
Intel Acceleration Stack
One of the more interesting aspects of the new Intel FPGA ecosystem is the Acceleration Stack, an OpenCL based programming environment that can be used by developers for hybrid cards or discrete cards, including FPGAs, CPUs, and GPUs. The stack abstracts the programming required for the FPGAs to streamline and speed up development for accelerators and applications being used. Additionally, it allows for code to be reusable — porting between FPGAs/GPU/CPU should be possible without major changes. OpenCL, a C based programming language, will. This is quite the opposite of what had been available when Intel released the E600C seven years ago.
Part of the stack is the Open Programmable Acceleration Engine (OPAE), which Intel has made available to the broader development community. OPAE’s drivers, tools, and libraries abstracts the Intel stack even further to provide a common [
So while some of Intel’s plans for FPGA based products may not be ground-breaking as concepts, the availability of the Acceleration Stack could make the Intel ecosystem an attractive option.
Acceleration stack. Image courtesy of Intel.
Intel’s Acceleration Stack and FPGA products are now being used for the Alibaba Group’s cloud computing service (« acceleration-as-a-service »). This service gives users an opportunity to access accelerated computing at a per-use fee and without having to invest in hardware. This service can be beneficial for use in genomics, machine learning applications, video transcoding, and financial computations.
This is just one of many possible applications of the stack, but is a sign that Intel’s haunch about cloud computing was right.