The Memory Market Heats Up With SK hynix’s 238-layer 4D NAND
Last week, Micron launched the production of a 232-layer 3D NAND. Now, SK hynix is claiming "highest 4D NAND flash" at 238 layers.
The memory market has heated up in the past year as demand for higher density and performance grows. Just last week, Micron announced the production of its 232-layer NAND flash technology—claimed to be the highest areal-density NAND chip in the industry.
SK hynix’s 4D NAND offering. Image used courtesy of SK hynix
Now, SK hynix is upping the ante with its newly-released 238-layer "4D NAND" technology. How exactly does 4D NAND compare to 3D NAND? And how does SK hynix's latest NAND feat fare against other recent advances in memory density?
3D NAND Spikes in Popularity
As NAND flash devices have scaled and performance demands have increased, the technology has reached an impasse. Namely, NAND devices are now so small that they are now encountering issues with cell reliability.
3D NAND architecture. Image used courtesy of Goda et al.
Many memory companies have turned to 3D NAND technology to sidestep these challenges. 3D NAND refers to a NAND structure in which the NAND cells are stacked on top of each other in vertical layers. This contrasts with traditional 2D NAND, where cells are placed side by side horizontally.
One major advantage of 2D NAND over 3D NAND is that it allows more memory density. By stacking cells vertically on top of one another, designers can still increase overall cell density without causing individual cells to get too close to one another. The result is higher memory density without leakages and other reliability issues that occur with traditional scaling.
What is 4D NAND?
4D NAND, a term specific to SK hynix memory technology, is another form of 3D NAND flash that further integrates NAND circuitry vertically.
Traditional 3D NAND architectures consist of both the stacked NAND array as well as peripheral circuitry. The periphery circuitry controls the array and manages memory reads and writes. In most designs, the peripheral circuitry is placed next to the 3D NAND array. This placement takes up die area and ultimately limits the amount of area that is usable for the memory itself.
SK hynix’s 4D NAND puts peripheral circuits underneath the NAND array. Image used courtesy of SK hynix
In contrast, “4D” NAND places the periphery circuit underneath the 3D NAND array. Similar to the concepts driving 3D NAND, 4D NAND further increases density and lowers costs thanks to vertical integration.
It is worth noting, however, that the concepts behind 4D NAND have been used elsewhere in the past, just under different names. For example, companies like Intel and Micron have employed the same architecture in their 3D NAND before but have called it “CMOS under Array” (CuA) technology.
SK hynix’s 4D NAND Reaches Towering New Heights
On August 2, SK hynix made headlines when it announced a new 238-layer 4D NAND technology.
The company claims that its new offering is the "world’s highest layer-count NAND" and offers a smaller cell area per unit than competing 3D NAND offerings. The result of this high density is higher performance and power efficiency: the company claims its product increases data-transfer speed by 50% and decreases energy consumption by 21% compared to its previous 176-layer technology. The company has yet to reveal other specific details, but the press release notes that the device can reach up to 2.4 Gbps transfer speeds and that memory capacity is 512 Gb.
The company used "peri under cell" technology (which places peripheral circuits under the cell array) and charge trap flash (CTF) (which stores electric charges in insulators) to achieve a 4D vertical structure. Image used courtesy of SK hynix
The company envisions its 238-layer product finding use in PC SSDs with later applications in smartphones and server storage. So far, SK hynix has started shipping samples of the product to select customers and has plans to begin mass production in the first half of 2023.