In the previous article on low-frequency MOSFETs, we looked at parameters—such as threshold voltage, on-state resistance, and maximum drain current—that govern a MOSFET’s steady-state operation. These properties are relevant to all applications, and if you’re designing a low-frequency system they cover most of the information that you need to select a suitable device.
Nowadays, though, it is very common to employ MOSFETs as switches that are controlled by relatively high-frequency (and often pulse-width-modulated) digital signals, even in analog applications. A perfect example is the Class D amplifier.
Despite the fact that the input signal is analog and the output signal is analog, the amplification is achieved using transistors that are switched from fully on to fully off. Switch-mode control is significantly more efficient than linear control, and this makes it an attractive option even when the resulting circuit is more complex and the resulting signal is negatively affected by switching noise.
In the previous article we discussed maximum continuous drain current. This parameter has a corresponding spec for transient events.
The maximum transient drain current is referred to as “pulsed drain current” or “peak drain current.” There are a few variables involved here (pulse width, duty cycle, ambient temperature), so this spec is not extremely useful. It does, however, give you a general idea of how much short-term current the device can sustain, and in some cases this will be more important than the steady-state limit (I’m thinking of applications where the high-current conditions are related to shoot-through, inrush, or low-duty-cycle PWM).
Another parameter related to avoiding damage in the context of transient events is the drain-source avalanche energy. The spec is given in units of joules, but it is related to voltages that exceed the MOSFET’s drain-source breakdown voltage. This issue is a bit complicated and certainly beyond the scope of this short article. If you want to learn more about avalanche characteristics, I recommend this app note from Infineon.
Diagram taken from the Infineon app note mentioned above.
Prominent among a FET’s dynamic parameters are the input capacitance, output capacitance, and reverse transfer capacitance. These are closely related to the typical (and more intuitively named) MOSFET capacitances referred to as the gate-drain capacitance (CGD), gate-source capacitance (CGS), and drain-source capacitance (CDS).
- Input capacitance (CISS) is the capacitance seen by an input signal, i.e., CGD plus CGS.
- Output capacitance (COSS) is the capacitance seen by an output signal; in the context of discrete FETs the output terminal is the drain, so COSS = CGD + CDS.
- Reverse transfer capacitance (CRSS) is the capacitance between the drain and the gate, i.e., CRSS = CGD.
Input capacitance (in conjunction with the resistance of the driver circuitry) influences the switching characteristics because more input capacitance means more turn-on and turn-off delay. You have to charge this capacitance when you drive the FET into conduction, and you have to discharge it when you want to turn the device off.
Output capacitance comes into play when we’re considering power dissipation and the resonant frequency of a switching circuit.
Reverse transfer capacitance affects turn-on and turn-off time (not surprising since it is part of the input capacitance), but notice that it forms a feedback loop (because the drain is considered the output and the gate is considered the input). A capacitor in the feedback path is subject to the Miller effect, and consequently the extent to which CRSS influences transient response is greater than we would expect based on the nominal capacitance value.
It turns out that MOSFET input capacitance is not the most reliable way to evaluate a device’s switching characteristics, because capacitance values are affected by voltage and current conditions. The following plot gives you an idea of how the three capacitance values vary in response to changes in drain-source voltage.
Plot taken from this app note published by NXP/Nexperia.
This app note also mentions “device size and transconductance” as factors that make it difficult to use capacitance as a basis for choosing one MOSFET over another. It is better to use gate charge specifications; for example:
Specs taken from this Vishay datasheet.
Gate charge is apparently a more straightforward way of assessing switching characteristics. Charge equals current multiplied by time, so if you know the output current of the device driving the gate and you know the gate charge specification of the FET, you can calculate the amount of time needed to turn on the device.
If you really want to avoid all calculations and theoretical details, you can simply restrict your part search to FETs that have switching times given in the datasheet. Look for specs labeled “turn-on time” (or “turn-off time”), “rise time” (or “fall time”), and “delay time.”
This approach is certainly simple, but as is often the case, the easiest solution isn’t the most robust solution. These “precooked” switching specs are based on specific conditions (perhaps the most important being the resistance of the gate-drive circuitry) that may not be consistent with your expected conditions or with the conditions used in a different datasheet. The NXP/Nexperia app note mentioned above says that “extreme care is needed” when comparing switching-time specs from one manufacturer to those of another manufacturer.
MOSFET dynamic behavior is not particularly straightforward, but I hope that this article has provided enough information to help you more thoroughly evaluate the dynamic behavior of different devices. If you have any experience to share regarding the real-life transient behavior of discrete FETs, feel free to share your thoughts in a comment.