Technical Article

Using the Load-Pull Technique in RF Power Amplifier Design

January 05, 2024 by Dr. Steve Arar

The output power and efficiency of a power amplifier (PA) are highly dependent on its load terminations. Learn how to characterize a PA's performance by analyzing load lines and estimating the load-pull contours of constant output power.

The source and load terminations of an active RF circuit can affect the device’s performance in important ways. That’s why, when we design an RF amplifier, we need to characterize the active device’s performance for different terminal impedances. In power amplifier (PA) design, we need to pay particular attention to the load impedance. A PA’s load termination has a large impact on its output power and efficiency—in other words, on its primary performance metrics.

Describing the device by its S-parameters is often sufficient for small-signal amplifiers, but PAs exhibit a high degree of nonlinearity. As a result, the classic small-signal S-parameters don’t provide us with an adequate description of their performance. In the case of PAs, we need to characterize the device performance for different values of load impedance while using a large signal excitation. This can be done through a conceptually simple—but highly effective—technique known as load-pull measurement.

 

What is Load-Pull Measurement?

Load-pull measurement is a general technique in which the load impedance presented to a device under test (DUT) is varied systematically. The performance for each load value is then recorded, and the data is used to obtain the contours of constant performance for the performance metric of interest.

Using the load-pull technique, we can plot contours of constant output power and efficiency on the impedance plane. This is best done using a Smith chart. Figure 1 shows some load-pull contours of output power (Pout) and power-added efficiency (PAE) for a typical PA.

 

Load-pull contours of power-added efficiency (in blue) and output power (in red) for a power amplifier.

Figure 1. Power-added efficiency (PAE) and output power (Pout) contours for a PA. Image used courtesy of Rohde & Schwarz

 

The load-pull contours allow us to account for the nonlinear response of the device, and can be used to design PAs in the same way we use constant gain or noise figure contours when designing small-signal amplifiers. They can also account for the amplifier’s package parasitics, though that’s mostly beyond the scope of this article.

RF design software tools usually include simulation tools specifically designed for performing load-pull measurements. These tools apply a number of different load impedances across the Smith chart and interpolate the results to construct contours of constant output power.

We can also estimate contours of constant power relatively easily if we have an equivalent circuit model of the device output and the package parasitics. In the rest of the article, we’ll see how (though, again, we’ll leave the parasitics out of our analysis for the moment).

 

Estimating Constant Output Power Contours

Figure 2 shows a Class A amplifier built around a FET device.

 

Circuit diagram of a Class A amplifier.

Figure 2. An example Class A amplifier. Image used courtesy of Steve Arar

 

For the purpose of our calculations, we’ll make the following assumptions about this amplifier:

  • It has a 3.5 V supply voltage (VDD = 3.5 V).
  • It has a maximum current of 1 A (Imax = 1 A).
  • The blue curves in Figure 3 show the piecewise linear approximation of the device’s characteristic curves.
  • The knee voltage of the characteristic curves (vk) is much smaller than VDD.

This last assumption isn’t strictly necessary for the analysis, but it does make explaining some of the relevant concepts simpler.

 

Graph of the characteristic curves and optimum load line of an example PA.

Figure 3. Characteristic curves (blue) and optimum load line (green) of an example PA. Image used courtesy of Steve Arar

 

First, let’s find our example amplifier’s optimum load and power. To achieve maximum output power, we choose the appropriate load resistance to bias the transistor in the middle of the load line. With vk being much smaller than VDD, the optimum bias point is VDSQ = 3.5 V and IDQ = 0.5 A. We use the bias point and the information in Figure 3 to find the optimum load resistance:

$$R_{opt}~=~\frac{V_{DD}}{\frac{I_{max}}{2}}~=~\frac{2 ~\times~ 3.5}{1}=~7~\Omega$$

Equation 1.

 

and the maximum output power:

$$P_{opt}~=~\frac{1}{2} ~\times~ V_{DD} ~\times~ \frac{I_{max}}{2}~=~\frac{1}{2} ~\times~ 3.5 ~\times~ \frac{1}{2}~=~0.875~ \text{W}$$

Equation 2.

 

The optimum output power of this PA is Popt = 0.875 W, and the optimum load resistance at which it’s achieved is Ropt = 7 Ω.

Now that we have the necessary information, let’s find the load terminations for this amplifier that produce an output power of 0.375 W.

 

Reducing Output Power by Reducing RL

We aim to find a load resistance that reduces the output power from 0.875 W to 0.375 W. It’s clear that we can reduce the output power by lowering the output resistance—the purple line in Figure 4 shows how the load line changes when we do so.

 

A graph of load lines for the optimum load resistance and a new, smaller, load resistance.

Figure 4. Load lines for Ropt (green) and a new, smaller load resistance (purple). Image used courtesy of Steve Arar

 

We still have the maximum possible current swing, but the voltage swing has been reduced. Since the current swing now is still equal to the current swing of the optimum load, we can make the comparison with Popt easier by writing the output power in terms of current:

$$P_{d}~=~\frac{1}{2} ~\times~ R_{low} ~\times~ (\frac{I_{max}}{2})^2$$

Equation 3.

 

where Rlow is the new load that produces a smaller output power.

Equation 2 can also be rewritten in terms of the maximum current swing:

$$P_{opt}~=~\frac{1}{2} ~\times~ R_{opt} ~\times~ (\frac{I_{max}}{2})^2$$

Equation 4.

 

Dividing Equation 3 by Equation 4 gives us:

$$\frac{P_{d}}{P_{opt}}~=~\frac{R_{low}}{R_{opt}}$$

Equation 5.

 

Substituting Popt = 0.875 W, Pd = 0.375 W, and Ropt = 7 Ω, we obtain Rlow = 3 Ω. The purple load line in Figure 4 confirms this—it has a slope of \(-\frac{1}{3}\), meaning that it corresponds to a load resistance of 3 Ω.

As the load line clearly shows, a smaller resistance reduces output power by lowering the voltage swing. If we use a resistance larger than Ropt, we can also achieve a smaller output power by doing the opposite—keeping the voltage swing at its maximum and reducing the current swing. Let’s try it.

 

Reducing Output Power by Increasing RL

The orange line in Figure 5 shows how the load line changes when we increase the load resistance.

 

Graph of three different load lines, one of which is higher than the optimum.

Figure 5. Load lines for an example Class A amplifier. Ropt is green, RL < Ropt is purple, RL > Ropt is orange. Image used courtesy of Steve Arar

 

The circuit still has maximum voltage swing. However, it has less current swing than it did with the optimum load. Since the voltage swing is equal to that of the optimum load, we can write the output power in terms of voltage to make comparison with Popt easier:

$$P_{d}~=~\frac{1}{2} ~\times~ \frac{V_{DD}^2}{R_{high}}$$

Equation 6.

 

where Rhigh is the new, higher load resistance that decreases the output power.

We can also rewrite Popt (Equation 2) in terms of the voltage swing:

$$P_{opt}~=~\frac{1}{2} ~\times~ \frac{V_{DD}^2}{R_{opt}}$$

Equation 7.

 

Equations 6 and 7 produce:

$$\frac{P_{d}}{P_{opt}}~=~\frac{R_{opt}}{R_{high}}$$

Equation 8.

 

With Popt = 0.875 W, Pd = 0.375 W, and Ropt = 7 Ω, we obtain Rhigh = 16.33 Ω. The slope of the orange load line in Figure 5 is equal to approximately \( -\frac{1}{16.33}\), which corresponds to a load resistance of Rhigh = 16.33 Ω.

To represent our results on a Smith chart (Figure 6), we normalize Rlow and Rhigh by 50 Ω. This produces normalized values of 0.06 and 0.33 (\(\frac{3}{50}\) and \(\frac{16.33}{50}\)), respectively.

 

A Smith chart showing the normalized values of the two new load resistances we found previously.

Figure 6. Smith chart showing the normalized values of Rlow and Rhigh (both marked in blue). Image used courtesy of Steve Arar

 

To summarize what we’ve learned so far: if the maximum output power is Popt, we can apply Equations 5 and 8 to find two different resistive loads (Rlow and Rhigh) that produce an output power of Pd. But what happens if we use complex terminations rather than purely resistive loads? Let’s find out.

 

Adding Reactive Components

Assume that our load termination (ZL) is Rlow plus some reactance:

$$Z_{L}~=~R_{low}~+~jX_{low}$$

Equation 9.

 

The average power delivered to the load is still given by Equation 2. However, the added reactance affects the voltage that appears across the load. When RL < Ropt, the maximum peak-to-peak current swing is Imax, and so the maximum peak-to-peak voltage swing for a complex impedance of ZL is:

$$V_{p-p}~=~I_{max} ~\times~ |Z_{L}| ~=~I_{max}\sqrt{R_{low}^2~+~X_{low}^2}$$

Equation 10.

 

From our load line analysis above, we know that the peak-to-peak voltage across the load is less than or equal to 2VDD. Therefore, we have:

$$I_{max}\sqrt{R_{low}^2~+~X_{low}^2} ~\leq~ 2V_{DD} ~~\Rightarrow~~ \sqrt{R_{low}^2~+~X_{low}^2} ~\leq~ R_{opt}$$

Equation 11.

 

where Equation 1 is used to obtain the final expression in terms of Ropt. We can simplify the above expression to:

$$|X_{low}| ~\leq~ \sqrt{ R_{opt}^2 ~-~ R_{low}^2 }$$

Equation 12.

 

This equation determines how much reactance can be added to Rlow without violating the maximum voltage swing constraint.

Substituting in Ropt = 7 Ω and Rlow = 3 Ω, we observe that |Xlow| must be less than or equal to 6.32 Ω, which corresponds to a normalized value of 0.13. The blue curve in Figure 7 shows the impedances that have a normalized real part of 0.06 for |Xlow| ≤ 0.13.

 

A smith chart showing a portion of the final output power contour that results from adding a reactance to Rlow.

Figure 7. Smith chart showing the portion of our final output power contour that results from adding a reactance to Rlow. Image used courtesy of Steve Arar

 

Now we’ve added a reactive component to Rlow, let’s consider doing the same with Rhigh. When RL > Ropt, the maximum peak-to-peak voltage swing across the load is constant (about 2VDD). We can therefore simplify our equations by describing the load as an admittance rather than an impedance.

Suppose that the load admittance is:

$$Y_{high}~=~G_{high}~+~jB_{high}$$

Equation 13.

 

where Ghigh is the reciprocal of Rhigh. Adding the susceptance Bhigh to the load termination doesn’t change the dissipated average power; Equation 6 still gives the average power delivered to the load. However, the added susceptance affects the current flowing through the load.

Since the maximum peak-to-peak voltage swing is equal to 2VDD, we can use the following equation to find the peak-to-peak load current:

$$I_{p-p}~=~V_{p-p} ~\times~ |Y_{L}| ~=~2V_{DD}\sqrt{G_{high}^2~+~B_{high}^2}$$

Equation 14.

 

From our load line analysis, we know that the peak-to-peak current through the load is less than or equal to Imax. Therefore, we have:

$$2V_{DD}\sqrt{G_{high}^2~+~B_{high}^2} ~\leq~ I_{max} ~~\Rightarrow~~ \sqrt{G_{high}^2~+~B_{high}^2} ~\leq~ G_{opt}$$

Equation 15.

 

Equation 1 is used to write the above equation in terms of Gopt, which is the reciprocal of Ropt. We can further simplify this equation to:

$$|B_{high}| ~\leq~ \sqrt{G_{opt}^2 ~-~ G_{high}^2}$$

Equation 16.

 

In our example, we have Ropt = 7 Ω and Rhigh = 16.33 Ω, which leads to |Bhigh| ≤ 0.13 S. This corresponds to a normalized value of 0.13 × 50 = 6.5 on the Smith chart. Below, Figure 8 shows the final constant output power contour for our desired value of 0.375 W.

 

A Smith chart showing the 0.375 W constant output power contour for our example PA.

Figure 8. The 0.375 W constant output power contour for our example PA. Image used courtesy of Steve Arar

 

Note that adding a susceptance to Ghigh is equivalent to moving along the constant conductance circle that goes through Ghigh.

The final contour consists of:

  • A portion of the constant resistance circle that goes through Rlow.
  • A portion of the circle that goes through Rhigh.

These two circles are represented as r = 0.06 and g = 3.1 in the above figure. The contour extends from the resistive loads to the points where the r = 0.06 and g = 3.1 circles intersect. This isn’t a coincidence, and it happens for every arbitrary value of desired output power.

This observation significantly simplifies finding the constant power contours—we only need to use Equations 5 and 8 to find the resistive points of the contour (Rlow and Rhigh). Then, we find the intersection points of the constant resistance circle going through Rlow and the constant conductance circle going through Rhigh.

The constant power contour extends from the resistive loads to the two intersection points. At these intersection points, the maximum voltage and current limits specified by Equations 11 and 15 are reached simultaneously.

Figure 9 shows two other constant power contours for the above example. The green contour corresponds to a power level of 0.236 W, or 23.74 dBm; the purple curve corresponds to 0.594 W, or 27.74 dBm.

 

Three constant output power contours for our example power amplifier.

Figure 9. Three constant output power contours for the example PA, marked in green, blue, and purple. Image used courtesy of Steve Arar

 

Table 1 lists the resistive loads for each constant power curve.

 

Table 1. Resistive loads for the constant power curves in Figure 9.
Power (W) Power (dBm) Rlow (Ω) Rhigh (Ω)
0.594 27.74 4.75 10.31
0.375 25.74 3.00 16.33
0.236 23.74 1.89 25.95

 

 

Accounting for Device Parasitics

The contours we’ve achieved determine the load termination that will be connected to the transistor’s internal current source. However, our analysis ignored parasitic components, which include the drain-source capacitance of the transistor and the parasitic capacitance and inductance from the package. If we take the parasitics into account, the contours we obtained will be mapped to new contours on the Smith chart. The end result will resemble the red curves in Figure 1.

For the sake of brevity, I won’t discuss these details here. If you want to learn more about this, however, I recommend the following texts:

 

Featured image used courtesy of Adobe Stock

2 Comments
  • V
    vtavas January 22, 2024

    For Figure 3, how can it be possible for VDS voltage to reach 2VDD, when we supply the circuit with VDD?

    Like. Reply
    • D
      Dr. Steve Arar January 24, 2024
      Please see the following article for an in-depth explanation: https://www.allaboutcircuits.com/technical-articles/inductively-loaded-class-a-power-amplifiers/
      Like. Reply