32-bit Pipelined 5x4Gbps CRC Generator

32-bit Pipelined 5x4Gbps CRC Generator


Category: Arithmetic Core

Created: July 22, 2002

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Stable

Additional info: ASIC proven, Design done, Specification done

WishBone compliant: No

WishBone version: n/a

License: GPL


A 32-bit parallel and highly pipelined Cyclic Redundancy Code (CRC) generator is presented. The design can handle 5 different channels at an input rate of 2Gbps each (the total output throughput is 5x4Gbps.)

The generated CRCs are compatible with the 32-bit Ethernet standards. The circuit has been implemented with standard cells in a 0.35Micron standard CMOS process using the properties of Galois Fields and has been conceived as a "free" IP.


- 5 independent channels @ 4Gbps each
- Works (simulations) with a standard AMS 0.35Micron process


- Ready to use.