8051 Slave To Wishbone Master Interface
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Details
Category: Uncategorized
Created: March 03, 2008
Updated: November 19, 2019
Language: Verilog
Other project properties
Development Status: Stable
Additional info: Design done, FPGA proven
WishBone compliant: Yes
WishBone version: n/a
License: n/a
Description
Interface an 8051-compatible microcontroller with the Wishbone bus.
Features
- Multiplexed 8051 address/data bus to Wishbone Master
- Very simple, very small.
- Since 8051 has no way to add additional wait-states via an external pin, the Wishbone must be fast enough to complete the cycle in time for the 8051.
Status
- Tested with Silicon Labs C8051 Microcontroller and Xilinx Coolrunner2 CPLD.
- Tested with Silicon Labs C8051 Microcontroller and Xilinx Spartan3 FPGA.
- this core is used in the Altair32 Front Panel: www.altair32.com
