This article will explain how the Arm computer architecture is organized, including its ISA, execution states, architecture, and processor families.

Arm is a ubiquitous name in the processor industry, and Arm cores can be found in virtually any modern device that needs computational power. This includes network routers, printers, smartphones, desktop monitors, medical devices, robots, and even refrigerators. Arm cores are already used in residential, commercial, and industrial applications—yet with the advent of Armv8, the architecture saw a fundamental shift in its capabilities and market potential. If you're interested in Armv8 you can easily read the latest Arm Architecture Reference Manual: it's a paltry 7500 pages.

With that in mind, it might be a good idea to step back and take a look at how the Arm computer architecture is organized from a high level, and how Armv8 altered what we used to know about Arm cores.


The Arm Computer Architecture

Due to the fact that Arm licenses out its architecture, there are both Arm designed microarchitectures and third-party microarchitectures. Arm releases an architecture, and other companies can implement that in their own design. In fact, the Arm reference manual does not lay out any specific microarchitecture, but instead defines the “behavior of an abstract machine referred to as a processing element”. As long as implementations conform to this defined behavior, they can be considered Arm cores. For instance, companies like Apple, Nvidia, Qualcomm, and Samsung have all designed their own Arm microarchitectures, which implement a specific Arm architecture.

Arm cores are organized into families. Families encapsulate specific architectures, which use specific instruction sets. The original Arm family was Arm1, which used the Armv1 architecture, along with the 32-bit ISA simply called Arm.

As the architecture grew, new features were added, including a new instruction set in the Armv4T architecture. This instruction set is called Thumb and is a 16-bit re-encoded subset of the Arm ISA. Thumb allows for greater code density than Arm. Its successor, Thumb-2, allows for both 16-bit and 32-bit instructions while offering greater code density than Arm and performance improvements over Thumb.


Thumb-2 offers measurable improvements over both Arm and Thumb. Taken from this presentation.


Arm ISAs and Execution State

With the announcement of Armv8, the first 64-bit Arm architecture, a clarification of the ISAs became appropriate. The original 32-bit Arm ISA was re-branded A32, while the new 64-bit ISA was dubbed A64. Thumb became T32. A32 and T32, while backwards compatible with the previous versions, were expanded upon in Armv8.

To maintain compatibility with earlier versions, Armv8 introduced two new execution states: AArch32 and AArch64. These are effectively 32-bit and 64-bit modes, respectively. In the AArch32 state, the A32 and T32 instructions sets are used, while AArch64 uses A64.


Arm Architectures

The Arm architectures are easy to spot because they always have a 'v' in their name. As mentioned earlier, Armv1 was the first Arm architecture, while Armv4T introduced the Thumb instruction set. The Arm11 family includes the Armv6 architecture along with a few other variations such as Armv6T2 and Armv6K. After Arm11, the families were reorganized into the Cortex series. As of now, the three Cortex families include all Armv7 and Armv8 architectures.

The iPhone 5S used the Apple-A7 SoC, which included a 64-bit Arm core, making it the first 64-bit processor ever used in a smartphone. The microarchitecture, which implemented the Armv8 architecture, was designed by Apple and dubbed Cyclone. The latest Raspberry Pi, a popular single-board computer, uses an Armv8 core but runs it in the AArch32 state because of OS and memory constraints. The core uses an Arm-designed microarchitecture called Cortex-A53.


The Apple A7 and Raspberry Pi both use implementations of the Armv8 architecture. Images courtesy of Wikipedia's Apple_A7 and Raspberry_Pi articles.


The Cortex Series

The modern Arm families are the Cortex series and include three architecture profiles: Cortex-A, Cortex-R, and Cortex-M. Any cores with this designation are microarchitectures designed in-house by Arm.

The Cortex-A family are primarily considered application processors with OS and third-party application support. This means they can end up in application-intensive smartphones or even servers. Cortex-A comes in 32-bit (Armv7-A) and 64-bit (Armv8-A) flavors. The Raspberry Pi 3, shown above, uses a Cortex-A53 Arm core, implementing the Armv8-A architecture.

The Cortex-R family, architectures Armv7-R and Armv8-R, are optimized for high-performance real-time applications. These processors have better fault tolerance and work well in safety-critical applications, including medical devices, industrial control systems, and safety instrumented systems.

The Cortex-M family are a group of scaled-down, low-cost 32-bit Arm cores consisting of Armv6-M, Armv7-M, and Armv8-M. This family of processors is geared toward microcontroller, ASIC, FPGA, and SoC applications. In direct competition with the 8-bit MCU market, a 32-bit Cortex-M core embedded into a larger SoC can be an incredibly powerful combination. Cortex-M has also found a niche in IoT applications with platforms like the Arm Mbed MCU and OS.


Arm architecture organized by ISA, architecture, and family. Image used courtesy of Arm



In this article, we took a bird's-eye view of the Arm computer architecture, with a focus on the different architectures and the instruction sets that they use. We also looked at the different execution states within an Armv8 core and how different architectures are classified into families. Specifically, we looked at the Cortex series of Arm cores and how the processor families are divided based on application and use-case.

Choosing the right Arm processor for your design or project can be difficult and confusing if you aren't familiar with the underlying architectures and classifications. Now that you know what all these letters and numbers mean, you can spend more time tinkering and less time scratching your head.


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