Digital Circuits
Flip-Flop Circuits
26 questions By Tony R. Kuphaldt
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Question 13 of 26
Determine what input conditions are necessary to set, reset, and toggle these two J-K flip-flops:

For the J-K flip-flop with active-high inputs:
- Set by . . .
- Reset by . . .
- Toggle by . . .
For the J-K flip-flop with active-low inputs:
- Set by . . .
- Reset by . . .
- Toggle by . . .
Reveal answerIn either case, you cause the flip-flop to go into these three modes by doing the following:
- Set by activating J, deactivating K, and clocking C.
- Reset by activating K, deactivating J, and clocking C.
- Toggle by activating J and K simultaneously, and clocking C.
Specifically, though, here is what you would need to do to each flip-flop, stated in terms of “high” and “low” logic states:
For the J-K flip-flop with active-high inputs:
- Set by making J high, K low, and C transition from low to high.
- Reset by making K high, J low, and C transition from low to high.
- Toggle by making J high, K high, and C transition from low to high.
For the J-K flip-flop with active-low inputs:
- Set by making K high, J low, and C transition from high to low.
- Reset by making J high, K low, and C transition from high to low.
- Toggle by making J low, K low, and C transition from high to low.
Notes:This question reviews the basic modes of J-K flip-flops, as well as the significance of active-low inputs.
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Question 14 of 26
Determine the output states for this J-K flip-flop, given the pulse inputs shown:

Reveal answer
Notes:Ask students to identify those regions on the timing diagram where the flip-flop is being set, reset, and toggled.
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Question 15 of 26
Determine the output states for this D flip-flop, given the pulse inputs shown:

Reveal answer
Notes:Ask students to identify those regions on the timing diagram where the flip-flop is being set and reset.




