Trigonometric functions (degrees) in Double FPU
Details
Category: Arithmetic Core
Created: May 31, 2013
Updated: January 27, 2020
Language: Verilog
Other project properties
Development Status: Alpha
Additional info: ASIC proven, Design done, FPGA proven, Specification done
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
This core takes unsigned value as degrees(input) and gives the corresponding value in IEEE-754 double (output).
This core can be easily configured degrees(inputs) bit width can be changed to any number of bits.
It only takes 10 clock cycles to complete one operation.
