We're continuing on 15-2 and we're looking at Gate Array Logic. Many IC manufacturers produce complex logic systems that can be programmed to perform a variety of logical functions within a single IC. Using this type of procedure you would not need to have your chips that had a whole bunch of AND gates and a whole bunch of inverters and so and so. You would have a single chip that you could program and program it as you see fit.
These ICs are known by various names: Gate Array Logic, Programmable Array Logic, Programmable Logic Device, Complex Programmable Logic Device. In your text, your text looks at this particular one right here - the PAL. We're not going to give a great deal of attention to this but we do want to at least introduce them.
Gate Array Logic: your text has three images of Gate Array Logic. Unfortunately, I do not have those images to put in this presentation. You'll need to refer to your textbook as in section 15-2 and you have images on 15-16a, b and c and 15-16a show how the chip would actually appear. If you want to refer to that please do. You might want to pause the presentation and then turn it back on after you found the page. This chip, you'll notice it has 20 inputs and this would plug into a circuit board. 15-16b it shows the internal circuitry and it features fusible links and these are titanium-tungsten that are selectively burned out to create the desired logic.
You'll notice that when they are burned out these will become permanent, so there's no changing. There are some that are actually programmable though this particular one it is permanent, you got to make you've got the logic right because if you don't you'll have to throw the thing away and start over. Diagram 15-16c on the following page, it shows how the links have been burned out to program a Boolean expression. You might note there's three inputs A, B and C and you'll see that there is the true and that they complement. The complement here simply means that you've got A and A NOT would be the complement.
Note to create AB: the fusible links for A and B are left intact while others are blown out. You'll need to look at this in particular, in that 15-16c. If you look closely you'll see that A and B ... they've got a little drawing there and you'll see where they crossover. There's that little link and the link is open and where they're blown out it looks like this where the link is broken. The ones that you would use are the ones that aren't blown out and you'll have the special device that when you program this you put on a special board. You send in the program, you want it in a few ... it burns the links to create the logic that you need.
The outputs use what we call Tri-State Inverters and they can be seen on 15-16b. If you go back to that page you'll notice there are eight inverters on the final stage that's on the far right. Each inverter has an input coming in from the top that allows for enabling or disabling of the output. When they are disabled, the output is either floating or sometimes it refers to that as being disconnected.
PALs and PLAs are the most basic type of Programmable Logic Devices. CPLDs combined two or more PLDs in the same IC package. The CPLDs can implement both combinational and they can do sequential logic as well. The CPLDs ... this is not all of them but many times they can be reprogrammed making them ideal for design work.
The reason this is advantageous - it might be obvious - is because every time you experiment you have to destroy the chip. That's not really a good thing. With programmable logic, you could go in, set up your logic and if it works, fine. If it doesn't work, you can just erase it and start over again.
We have briefly introduced Gate Array Logic, we look at Tri-State Inverters and we looked at the PLA that's depicted in your text and that concludes our brief look at Gate Array Logic.
Video Lectures created by Tim Fiegenbaum at North Seattle Community College.
by Mark Hughes
by Gary Elinoff
by Gary Elinoff
by Steve Arar
by Gary Elinoff