As discussed in a previous article, Miller frequency compensation makes it possible to use rather small values of the compensation capacitance *C _{ƒ}*. This is highly desirable not only because

*C*can be fabricated on-chip, but also because it results in faster dynamics than, say, shunt-capacitance compensation. This is so because the

_{ƒ}*slew rate*, the

*open-loop bandwidth*, and the

*full-power bandwidth*are approximately

*inversely proportional*to

*C*.

_{ƒ}Now, compensation for closed-loop gains all the way down to unity gain is the most conservative in terms of the size of *C _{ƒ}*. There are many applications involving closed-loop gains greater than a minimum, such as greater than

*A*= 10 V/V, which would work with an

_{min}*even smaller C*and thus enjoy

_{ƒ}*even faster*dynamics.

Let us use our running PSpice circuit example, first introduced in my article on op-amp frequency compensation, to compare decompensation versus full compensation:

**Figure 1.** PSpice circuit to plot a fully compensated and a decompensated open-loop gain.

**Figure 1.**PSpice circuit to plot a fully compensated and a decompensated open-loop gain.

The results from PSpice can be seen in the figure below:

**Figure 2.** Open-loop gains with full compensation (C_{ƒ} = 9.90 pF for closed-loop gains ≥ 0 dB) and with decompensation (C_{ƒ} = 2.334 pF for closed-loop gains ≥ 20 dB). Both compensations enjoy φ_{m} ≥ 65.5°

**Figure 2.**Open-loop gains with full compensation (C

_{ƒ}= 9.90 pF for closed-loop gains ≥ 0 dB) and with decompensation (C

_{ƒ}= 2.334 pF for closed-loop gains ≥ 20 dB). Both compensations enjoy φ

_{m}≥ 65.5°

The results elicit the following observations:

- With
*full compensation*(*C*= 9.90 pF), the 0-dB gain has the crossover frequency_{ƒ}*ƒ*≈ 5.86 MHz and the phase margin_{x}*φ*= 65.5°. Also, if we configure the fully-compensated op-amp for a 20-dB closed-loop gain, it has_{m}*ƒ*≈ 633 kHz and_{x}*φ*≈ 87°, an even greater margin than the 0-dB gain._{m} - With
*decompensation*(*C*= 2.334 pF), the 20-dB gain has_{ƒ}*ƒ*≈ 2.37 MHz (a wider bandwidth than with full compensation) and still_{x}*φ*= 65.5°. However, were we to configure the decompensated op-amp for a 0-dB closed-loop gain, it would have_{m}*ƒ*≈ 11.1 MHz and_{x}*φ*≈ 24°, a poor margin because the decompensated device is meant for gains ≥ 20 dB. With_{m}*φ*≈ 24°, the 20-dB gain would exhibit a peaking of about 7% and a transient response with an overshoot of about 50%, both of which are usually unacceptable._{m}

Now let's move on to considering how we can achieve compensation in our circuit using external factors; for example, resistors.

### External Compensation Using Resistors

Even though decompensated op-amps are meant for closed-loop gains *higher* that *A _{min}* (

*A*= 20 dB in the above example), their superior dynamics makes them attractive also for applications involving gains

_{min}*lower*than

*A*.

_{min}But this would reduce the phase margin *φ _{m}*, so it is the user’s responsibility to compensate the circuit

*externally*in order to keep

*φ*at the desired level.

_{m}To illustrate, let us take the op-amp of Figure 1 in a decompensated form with *C _{ƒ}* = 2.334 pF, and let us configure it for voltage-follower operation as in Figure

*3(a)*.

*(a) (b)*

**Figure 3.** Voltage follower: (a) Uncompensated, and (b) compensated externally for φ_{m} ≈ 65.5°.

**Figure 3.**Voltage follower: (a) Uncompensated, and (b) compensated externally for φ

_{m}≈ 65.5°.

As mentioned, this circuit has a phase margin of only *φ _{m}* ≈ 24°. How do we raise it to

*φ*= 65.5°? A simple solution is to raise its

_{m}*1/β*curve to 20 dB, while still ensuring unity gain. We achieve this by connecting a resistance pair

*R*in a 1-to-9 ratio as shown in Figure

_{c}-R_{ƒ}*3(b)*. The closed-loop gain in the idealized limit

*a → ∞*is still

#### $$A_{ideal}=1.0V/V$$

**Equation 1**

**Equation 1**

(This is the case because for *a → ∞* the voltage across the op-amp’s input terminals tends to zero. This implies zero current through *R _{c}* and, thus, zero current also through

*R*. Consequently, the voltage across

_{ƒ}*R*is zero, so we have

_{ƒ}*V*=

_{o}*V*.)

_{i}However, the feedback factor *β*, which we find via the test circuit of Figure *4(a)* is

#### $$β=\frac{V_{n}}{V_{t}}=\frac{R_{c}}{R_{c}+R_{f}}=0.1$$

**Equation 2**

**Equation 2**

or *1/β* = 10 = 20 dB (note that *1/β* ≠ *A _{ideal}* in this example).

*(a) (b)*

**Figure 4.** (a) Circuit to find the feedback factor β of the voltage follower of Figure 3(b), and (b) Bode-plot visualization.

**Figure 4.**(a) Circuit to find the feedback factor β of the voltage follower of Figure 3(b), and (b) Bode-plot visualization.

The responses are shown in Figure 5.

*(a) (b)*

**Figure 5.** (a) PSpice circuit to visualize (b) the responses of the voltage followers of Figure 3. The Laplace block simulates the decompensated response of Figure 2, obtained with C_{ƒ} = 2.334 pF.

**Figure 5.**(a) PSpice circuit to visualize (b) the responses of the voltage followers of Figure 3. The Laplace block simulates the decompensated response of Figure 2, obtained with C

_{ƒ}= 2.334 pF.

A similar line of reasoning applies to the unity-gain inverting amplifier of Figure *6(a)*.

*(a) (b)*

**Figure 6.** External compensation of a unity-gain inverting amplifier.

**Figure 6.**External compensation of a unity-gain inverting amplifier.

In this case, in the limit *a → ∞*, we have

#### $$A_{ideal}=-\frac{R_{2}}{R_{1}}=-1.0V/V$$

**Equation 3**

**Equation 3**

By inspection, the feedback factor is now

#### $$β=\frac{R_{1}||R_{c}}{(R_{1}||R_{c})+R_{2}}=0.1$$

**Equation 4**

**Equation 4**

In this case, *R _{c}* has been chosen so as to make (

*R*||

_{1}*R*) =

_{c}*R*/9.

_{2}

### Applications (and Disadvantages) of Resistive Compensation

The above discussion, specialized for the unity-gain noninverting and inverting amplifiers, can easily be generalized to the case of closed-loop gains other than unity, but still such that 1 < (1 + *R _{2}/R_{1}*) <

*A*.

_{min}Whether the circuit is used as a noninverting amplifier (*A _{ideal}* = 1 +

*R*) or as an inverting amplifier (

_{2}/R_{1}*A*= –

_{ideal}*R*), so long as the condition (1 +

_{2}/R_{1}*R*) <

_{2}/R_{1}*A*holds, we place a resistance

_{min}*R*across the op-amp’s input terminals such 1 +

_{c}*R*/(

_{2}*R*||

_{1}*R*) = 1 +

_{c}*R*+

_{2}/R_{1}*R*=

_{2}/R_{c}*A*.

_{min}Resistive compensation, though straightforward, suffers from two disadvantages:

- Any noise that can be modeled with a voltage source in series with the noninverting input, such as the input offset voltage
*V*, gets amplified by_{OS}*1/β*, also called the*noise gain*because of this. - The loop gain
*T*= (*aβ*= –*V*/_{o}*V*in Figure_{t}*4(a)*) gets reduced (by a factor of 10 in the present example), causing a drop in the closed-loop DC accuracy of the circuit.

### Input-Lag Compensation

We can alleviate the limitations of resistive compensation by placing a suitable capacitance *C _{c}* in series with

*R*, as depicted in Figure

_{c}*7(a)*for the inverting amplifier.

*(a) (b)*

**Figure 7.** (a) Input-lag compensation of the unity gain inverting amplifier, and (b) Bode-plot visualization.

**Figure 7.**(a) Input-lag compensation of the unity gain inverting amplifier, and (b) Bode-plot visualization.

Note that to ensure the desired phase margin, we need to trick the amplifier into the desired rate-of-closure (ROC) only in the *vicinity* of the crossover frequency *ƒ _{x}*, not necessarily all the way down to DC.

Physically, the *1/β* curve breaks at the frequency *ƒ _{c}* at which the capacitive impedance’s magnitude equals

*R*, or |1/(

_{c}*j2πC*| =

_{c}*R*, giving

_{c}

#### $$C_{c}=\frac{1}{2πR_{c}f_{c}}$$

**Equation 5**

**Equation 5**

To prevent appreciable erosion of the phase margin *φ _{m}*, it is customary to place

*ƒ*about a

_{c}*decade*below

*ƒ*, or

_{x}

#### $$f_{c}≈\frac{f_{x}}{10}$$

**Equation 6**

**Equation 6**

For the circuit of Figure *7(a)*, this implies *C _{c}* ≈ 54 pF. The simulation of Figure 8 yields measured values of

*ƒ*= 2.38 MHz and

_{x}*φ*= 61°.

_{m}

**Figure 8**. (a) PSpice circuit to (b) visualize the stabilizing effect of input-lag compensation for the unity-gain inverting amplifier.

**Figure 8**. (a) PSpice circuit to (b) visualize the stabilizing effect of input-lag compensation for the unity-gain inverting amplifier.

### An Alternative Approach to External Frequency Compensation

Input-lag compensation is notorious for creating a pole-zero doublet in the closed-loop response, which leads, among others, to intolerably long settling time characteristics. These shortcomings are avoided by the alternative compensation approach advanced by Michael Steffes and shown in Figure 9.

*(a) (b)*

**Figure 9.** (a) Michael Steffes’ compensation technique for decompensated op-amps, and (b) Bode plot visualization.

**Figure 9.**(a) Michael Steffes’ compensation technique for decompensated op-amps, and (b) Bode plot visualization.

We have already encountered a circuit of this type in a previous article on stray input capacitance compensation, so many of the considerations made there apply also to the present circuit, the only difference being that now *C _{1}* is

*intentional*.

We are interested in developing two conditions for specifying the values of *C _{1}* and

*C*. At high frequencies, where the impedances of

_{2}*C*and

_{1}*C*are much smaller, in magnitude, than

_{2}*R*and

_{1}*R*, we can ignore

_{2}*R*and

_{1}*R*and state that at high frequencies we have

_{2}*1/β*→ 1 +

*C*.

_{1}/C_{2}Imposing 1 + *C _{1}/C_{2}* = 20 dB = 10 gives the first condition for our circuit example

#### $$C_{1}=9C_{2}$$

**Equation 7**

**Equation 7**

The second condition stems from the fact that

#### $$C_{2}=\frac{1}{2πR_{2}f_{c}}$$

**Equation 8**

**Equation 8**

so the value of *C _{2}* depends on where we decide to position

*ƒ*.

_{c}Rather than apply the detailed analysis by Steffes, which is beyond the scope of the present article, here we adopt a heuristic approach.

We start out with Equations (6) and (8), and use the PSpice circuit of Figure 10 to observe the AC responses as we gradually increase *ƒ _{c}* by decreasing

*C*while maintaining the condition of Equation (7).

_{2}

**Figure 10.** PSpice circuit to plot the AC response of the inverting amplifier of Figure 9a. To plot the transient response, change the AC input source to a pulse source.

**Figure 10.**PSpice circuit to plot the AC response of the inverting amplifier of Figure 9a. To plot the transient response, change the AC input source to a pulse source.

We stop when the AC response just starts to exhibit peaking. This approach gives *C _{2}* = 12 pF and

*C*= 9

_{1}*C*= 108 pF, resulting in the well-behaved responses of Figure 11. The AC response has a –3-dB frequency of 2.36 MHz.

_{2}

*(a) (b)*

**Figure 11. ** (a) AC response and (b) step response of the inverting amplifier of Figure 10.

**Figure 11.**(a) AC response and (b) step response of the inverting amplifier of Figure 10.

It is worth pointing out that any stray capacitance *C _{n}* present at the inverting input can be incorporated into this compensation scheme by changing the value of

*C*to

_{1}*9C*–

_{2}*C*. So, if, say,

_{n}*C*= 20 pF, then we use

_{n}*C*= 88 pF.

_{1}

In this article, we looked at decompensated and externally compensated operational amplifiers. We used example circuits to demonstrate what op-amp frequency compensation could be achieved through various means and considered each methods pros and cons.

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