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Category: Testing / Verification IP Cores (2)

VHDL Test Bench for FPGA/ASIC Verification

VHDL Test Bench for FPGA/ASIC Verification

Overview The VHDL test bench is a collection of VHDL procedures and functions which allow the user to create their own scripting instructions for…

License : BSD
Language : VHDL
High Load Configurable Test Project

High Load Configurable Test Project

The project is intended for checking FPGA-based device for high consumption power. Number of parameter gives possibility to change number of used…

License : BSD
Language : VHDL