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Digital Circuits

Timer Circuits


18 questions By Tony R. Kuphaldt

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  • Question 7 of 18

    A sequential timer circuit may be constructed from multiple 555 timer ICs cascaded together. Examine this circuit and determine how it works:





    Can you think of any practical applications for a circuit such as this?

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  • Question 8 of 18

    Predict how the operation of this astable 555 timer circuit will be affected as a result of the following faults. Specifically, identify what will happen to the capacitor voltage (VC1) and the output voltage (Vout) for each fault condition. Consider each fault independently (i.e. one at a time, no multiple faults):





    Resistor R1 fails open:
    Solder bridge (short) across resistor R1:
    Resistor R2 fails open:
    •Solder bridge (short) across resistor R2:
    Capacitor C1 fails shorted:

    For each of these conditions, explain why the resulting effects will occur.

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  • Question 9 of 18

    This circuit uses a “555” integrated circuit to produce a low-frequency square-wave voltage signal (seen between the “Out” terminal of the chip and ground), which is used to turn a pair of transistors on and off to flash a large lamp. Predict how this circuit will be affected as a result of the following faults. Consider each fault independently (i.e. one at a time, no multiple faults):





    Transistor Q1 fails open (collector-to-emitter):
    Transistor Q2 fails open (collector-to-emitter):
    Resistor R3 fails open:
    Transistor Q1 fails shorted (collector-to-emitter):

    For each of these conditions, explain why the resulting effects will occur.

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