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Canny edge detector with a 9x9 mask (gradient + gaussian filtering with sigma = sqrt(2)). Able to produce a throughput of 1 pixel per clock cycle.…
WDSP project includes three System on Chip (SoC) cores, which implement the Digital Signal Processing (DSP) functions: Finite Impulse Response…
The circuits found here implement digital leapfrog filters as described in <http://en.wikibooks.org/wiki/Signal_ProcessingDigital_Filters>.…
The DDS IP core (dds_synthesizer) is a implementation of a direct digital frequency synthesizer (DDS) (also called number controlled oscillator,…
FFT-based FIR Filter is a unit to perform the finite impulse responce filter based on the Fast Fourier Transform (FFT). It performs the convolution…
VHDL Parametrizable FIR Filter Implementation: -Direct Form II -Real format entry for normalized coeficients -Internal fixed-point implementation…
This project is the special floating-point Fast Fourier transform realization. Floating point representation has only 24 bits and takes into…
The Hilbert Transform is an important component in communication systems, e.g. for single sideband modulation/demodulation, amplitude and phase…
This FIR filter is very generic and flexible. It has been tested working on an FPGA, though the existing version does not yet have a Wishbone…
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Low-Pass IIR Filter IP core is a unit to perform the Infinite Impulse Responce (IIR) low pass filter which pass frequency is tuned dynamically Main…
DCT soft core is the unit to perform the Discrete Cosine Transform (DCT). It performs twodimensional 8 by 8 point DCT for the period of 64 clock…
This project is a digital signal processing (DSP) implementation of a circuit that provides periodic samples of both sine and cosine waveforms.…