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Category: Testing / Verification IP Cores (4)

Logic Probe - Simple Logic Analyzer

Logic Probe - Simple Logic Analyzer

LogicProbe is a very simple logic analyzer which can be run on an FPGA in parallel with the "device under test". The analyzer has a width…

License : BSD
Language : Verilog
VHDL Test Bench for FPGA/ASIC Verification

VHDL Test Bench for FPGA/ASIC Verification

Overview The VHDL test bench is a collection of VHDL procedures and functions which allow the user to create their own scripting instructions for…

License : BSD
Language : VHDL
Soundfile Testbench - Verilog VPI Testbench for Audio

Soundfile Testbench - Verilog VPI Testbench for Audio

Source Code I should push the git repo into OC SVN once all features are implemented. At the moment it is hosted on GitHub (…

License : BSD
Language : Verilog
High Load Configurable Test Project

High Load Configurable Test Project

The project is intended for checking FPGA-based device for high consumption power. Number of parameter gives possibility to change number of used…

License : BSD
Language : VHDL