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Flip-Flop Circuits


26 questions By Tony R. Kuphaldt

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  • Question 25 of 26

    A student has an idea to make a J-K flip-flop toggle: why not just connect the J, K, and Clock inputs together and drive them all with the same square-wave pulse? If the inputs are active-high and the clock is positive edge-triggered, the J and K inputs should both go “high” at the same moment the clock signal transitions from low to high, thus establishing the necessary conditions for a toggle (J=1, K=1, clock transition):





    Unfortunately, the J-K flip-flop refuses to toggle when this circuit is built. No matter how many clock pulses it receives, the Q and [Q] outputs remain in their original states - the flip-flop remains “latched.” Explain the practical reason why the student’s flip-flop circuit idea will not work.

    Reveal answer
  • Question 26 of 26

    Predict how the operation of this sound-activated lamp circuit will be affected as a result of the following faults. Consider each fault independently (i.e. one at a time, no multiple faults):





    Resistor R1 fails open:
    Resistor R3 fails open:
    Diode D1 fails open:
    Transistor Q2 fails shorted between collector and emitter:
    Solder bridge past resistor R5:

    For each of these conditions, explain why the resulting effects will occur.

    Reveal answer

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