Digital Circuits
Flip-Flop Circuits
26 questions By Tony R. Kuphaldt
-
Question 22 of 26
The flip-flop circuit shown here is classified as synchronous because both flip-flops receive clock pulses at the exact same time:

Define the following parameters:
- Set-up time
- Hold time
- Propagation delay time
- Minimum clock pulse duration
Then, explain how each of these parameters is relevant in the circuit shown.
Reveal answerThe clock frequency must be slow enough that there is adequate set-up time before the next clock pulse. The propagation delay time of FF1 must also be larger than the hold time of FF2. And, of course, the pulse width of the clock signal must be long enough for both flip-flops to reliably “clock.”
Notes:I could have simply asked students to define the terms, but where’s the fun in that? Seriously, though, these concepts will make far more sense to students when they are viewed in a practical context. After all, the whole purpose of teaching these concepts is so students will be able to apply them, right?
-
Question 23 of 26
Locate a manufacturer’s datasheet for a flip-flop IC, and research the following parameters:
- Flip-flop type (S-R, D, J-K)
- Part number
- ANSI/IEEE standard symbol
- How many asynchronous inputs
- Minimum setup and hold times (shown in timing diagrams)
Reveal answerI’ll let you do the research on this question!
Notes:In case students claim they “could not find any parts to research,” suggest the following:
- 74107
- 74109
- 74112
- 40174
- 40175
-
Question 24 of 26
Although the toggle function of the J-K flip-flop is one of its most popular uses, this is not the only type of flip-flop capable of performing a toggle function. Behold the surprisingly versatile D-type flip-flop configured to do the same thing:

Explain how this circuit performs the “toggle” function more commonly associated with J-K flip-flops.
Reveal answerAt each clock pulse, the flip-flop must switch to the opposite state because D receives inverted feedback from [Q].
Notes:The main purpose of this question is to get students to see that toggling is not the exclusive domain of J-K flip-flops. This fact may be particularly handy to know if one needs a toggle function in a circuit but only has a D-type flip-flop available, not a J-K flip-flop.

