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Latch Circuits
26 questions By Tony R. Kuphaldt
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Question 10 of 26
A student builds this simple S-R latch for their lab experiment:
When the student powers up this circuit, she notices something strange. Sometimes the latch powers up in the set state (Q high and [Q] low), and other times it powers up in the reset state (Q low and [Q] high). The power-up state of their circuit seems to be unpredictable.
What state should their circuit power up in? Did the student make an error building the latch circuit?
Reveal answerThe circuit is fine, and working properly. The normal power-up state of a latch circuit is unpredictable, so long as both the inputs are inactive.
Notes:Although the circuit itself is simple, the phenomenon is not. Tell your students that what they’re dealing with here is something called a race condition, where two or more gates try to “race” each other to reach a certain logic state. Analyze the power-up state of this circuit with your students, and they will see that an unstable condition exists when both inputs are inactive!
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Question 11 of 26
The circuit shown here is a gated S-R latch. Write the truth table for this latch circuit, and explain the function of the “Enable” (E) input:
Reveal answerWhen the Enable input is low (0), the circuit ignores the Set and Reset inputs:
Notes:Just one more level of gating added to an S-R latch circuit!
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Question 12 of 26
Here is an S-R latch circuit, built from NAND gates:
Add two more NAND gates to this circuit, converting it into a gated S-R latch, with an Enable (E) input, and write the truth table for the new circuit.
Reveal answer
Follow-up question: explain why the inputs to the latch circuit are not active-low as they were before the addition of the two extra NAND gates. In other words, why does this latch now have S and R inputs rather than [S] and [R] inputs as it did before?
Notes:Ask your students if they see any practical advantage to this latch circuit over a gated latch built from NOR gates. What if they had to build a latch circuit from individual gates, rather than as a complete integrated circuit in and of itself? Would one design be preferable over the other?
Then, ask your students to compare the truth tables of the two different types of gated latches. Is there any difference in operation at all between the latch built with NAND gates and the latch built with NOR gates?
