Latch Circuits

Complete the timing diagram, showing the state of the Q output over time as the input switches are actuated. Assume that Q begins in the low state on power-up:

An analog-to-digital converter is a circuit that inputs a variable (analog) voltage or current and outputs multiple bits of binary data corresponding to the magnitude of that measured voltage or current. In the circuit shown here, an ADC inputs a voltage signal from a potentiometer, and outputs an 8-bit binary “word,” which may then be read by a computer, transmitted digitally over a communications network, or stored on digital media:

As the input voltage changes, the binary number output by the ADC will change as well. Suppose, though, that we want to have sample-and-hold capability added to this data acquisition circuit, to allow us to “freeze” the output of the ADC at will. Explain how using eight D latch circuits will give us this capability:

Gated latch circuits often come packaged in multiple quantities, with common gate inputs, so that more than one of the latches within the integrated circuit will be enabled and disabled simultaneously. Examine this logic symbol, representative of the 74AC16373, a 16-bit D-type latch with tri-state outputs:

Note how the sixteen D latches are divided into two groups of eight. Explain the functions of the four inputs at the very top of the symbol (1EN, C1, 2EN, and C2). Which of these input lines correspond to the “Enable” inputs seen on single D-type latch circuits? Also, describe what the “wedge” shapes represent on the 1EN and 2EN input lines.

Suppose you wished to have all sixteen latch circuits enabled as one, rather than as two groups of eight. Show what you would have to do to this circuit in order to achieve this goal.