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Category: DSP Core IP Cores (18)

Canny Edge Detector with 9x9 Mask

Canny Edge Detector with 9x9 Mask

Canny edge detector with a 9x9 mask (gradient + gaussian filtering with sigma = sqrt(2)). Able to produce a throughput of 1 pixel per clock cycle.…


License : LGPL
Language : VHDL
Adaptive LMS equalizer

Adaptive LMS equalizer

Adaptive LMS Equalizer In communication systems channel poses an important role. channels can convolve many different kind of distortions to our…


License : GPL
Language : VHDL
Wishbone DSP Compatible Cores

Wishbone DSP Compatible Cores

WDSP project includes three System on Chip (SoC) cores, which implement the Digital Signal Processing (DSP) functions: Finite Impulse Response…


License : LGPL
Language : VHDL
All-pole Lowpass IIR Filters

All-pole Lowpass IIR Filters

The circuits found here implement digital leapfrog filters as described in <http://en.wikibooks.org/wiki/Signal_ProcessingDigital_Filters>.…


License : LGPL
Language : VHDL
Generic FIR Digital Filters

Generic FIR Digital Filters

This is an elementary generic structural VHDL code for FIR digital filters in transposed-form and direct-form implementations. This project covers…


License : GPL
Language : VHDL
Fully Pipelined DDS Synthesizer or NCO

Fully Pipelined DDS Synthesizer or NCO

The DDS IP core (dds_synthesizer) is a implementation of a direct digital frequency synthesizer (DDS) (also called number controlled oscillator,…


License : LGPL
Language : VHDL
VHDL Viterbi Decoder : An AXI4-Stream Compliant

VHDL Viterbi Decoder : An AXI4-Stream Compliant

A fully configurable VHDL Viterbi decoder compliant with the AXI4-Stream interface. Most standards using convolutional codes like Wifi or GSM are…


License : GPL
Language : VHDL
Fast Fourier Transformer (FFT) based FIR Filter

Fast Fourier Transformer (FFT) based FIR Filter

FFT-based FIR Filter is a unit to perform the finite impulse responce filter based on the Fast Fourier Transform (FFT). It performs the convolution…


License : LGPL
Language : VHDL
VHDL Parametrizable FIR Filter

VHDL Parametrizable FIR Filter

VHDL Parametrizable FIR Filter Implementation: -Direct Form II -Real format entry for normalized coeficients -Internal fixed-point implementation…


License : LGPL
Language : VHDL
Floating-point FFT/IFFT on Xilinx FPGA Device

Floating-point FFT/IFFT on Xilinx FPGA Device

This project is the special floating-point Fast Fourier transform realization. Floating point representation has only 24 bits and takes into…


License : LGPL
Language : VHDL
Digital Hilbert Transformer for FPGA-based

Digital Hilbert Transformer for FPGA-based

The Hilbert Transform is an important component in communication systems, e.g. for single sideband modulation/demodulation, amplitude and phase…


License : LGPL
Language : VHDL
Flexible and Generic FIR Filter on FPGA

Flexible and Generic FIR Filter on FPGA

This FIR filter is very generic and flexible. It has been tested working on an FPGA, though the existing version does not yet have a Wishbone…


License : LGPL
Language : VHDL
Low Power FIR Filter in VHDL Usind OrCAD’s Capture CIS

Low Power FIR Filter in VHDL Usind OrCAD’s Capture CIS

Please write a description of the project here. It is used as a MetaTag (search engines looks at this).


License : LGPL
Language : VHDL
Fully Pipelined Low-Pass IIR Filter

Fully Pipelined Low-Pass IIR Filter

Low-Pass IIR Filter IP core is a unit to perform the Infinite Impulse Responce (IIR) low pass filter which pass frequency is tuned dynamically Main…


License : LGPL
Language : VHDL
NCO/DDS: A Periodic Waveform Generator

NCO/DDS: A Periodic Waveform Generator

This core is a straight forward implementation of a Numerically Controlled Oscillator (NCO) - also referred to as a Direct Digital Synthesizer…


License : GPL
Language : VHDL
Pipelined Two Dimensional 8x8 Point DCT/IDCT

Pipelined Two Dimensional 8x8 Point DCT/IDCT

DCT soft core is the unit to perform the Discrete Cosine Transform (DCT). It performs twodimensional 8 by 8 point DCT for the period of 64 clock…


License : LGPL
Language : VHDL
Configurable VIIRF - Versatile IIR Filter for Any Transfer Function

Configurable VIIRF - Versatile IIR Filter for Any Transfer Function

This project comprises the VHDL description and configuration script of a configurable IIR filter. The VIIRF can implement any transfer function…


License : Others
Language : VHDL
Quadrature Oscillator : Digital Signal Processing

Quadrature Oscillator : Digital Signal Processing

This project is a digital signal processing (DSP) implementation of a circuit that provides periodic samples of both sine and cosine waveforms.…


License : LGPL
Language : VHDL