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Category: System On Chip IP Cores (6)

GECKO4 SoC Co-design Environment

GECKO4 SoC Co-design Environment

Please write a description of the project here. It is used as a MetaTag (search engines looks at this).

License : Others
Language : VHDL
GECKO3 SoC General Purpose Co-design Environment

GECKO3 SoC General Purpose Co-design Environment

The GECKO system is a general purpose hardware/software co-design environment for real-time information processing and/or system-on-chip (SoC)…

License : Others
Language : VHDL
Software Defined Radio CCSDS RX/TX SoC

Software Defined Radio CCSDS RX/TX SoC

Software Defined Radio RX/TX. Consultative Committee for Space Data System (CCSDS) specifications compliant. This is part of a larger project…

License : Others
Language : VHDL
H2 System-On-Chip VHDL based on J1 CPU

H2 System-On-Chip VHDL based on J1 CPU

The H2 is a System On a Chipc (SoC) built around a stack processor that can directly execute Forth called the H2. The system is written in VHDL and…

License : Others
Language : VHDL
Martins SoC Instancing, Simulation Toolchain Builder

Martins SoC Instancing, Simulation Toolchain Builder

The MaSoCist is an acronym for 'Martins SoC Instancing, Simulation Toolchain'. It is a VHDL collection and toolchain based on various open…

License : Others
Wishbone Version : B.3
Language : VHDL
Simple AXI4-Lite bridges for IPbus and Wishbone

Simple AXI4-Lite bridges for IPbus and Wishbone

This project provides very simple bridges from AXI4-Lite interface to IPbus and Wishbone buses. The design has been tested on Xilinx Zynq (Z-Turn…

License : Others
Language : VHDL