Here i am trying to demonstrate my idea, that Russell's paradox of set theory can be solved by computer simulation in discrete time. It leads…
A scalable synchronous round-robin arbiter. The arbiter is designed to run at reasonable clock speeds with up to hundreds of request lines, and it…
This core is part of the Milkymist System-on-Chip, the most advanced open source SoC for interactive multimedia applications. 16-bit 48kHz stereo…
TosNet is a common name for the combination of an experimental control protocol, network and framework, mainly intended for use in research and…
Simple FM Receiver Simple implementation of FM Receiver to demodulate square wave signal modulated in FM. This design uses PLL to demodulate FM…
Simple linear digital automatic gain control. More info: https://www.embedded.com/print/4214571
The design of the All Digital FM Receiver circuit in this project uses Phase Locked Loop (PLL) as the main core. The task of the PLL is to maintain…
SCCT is a Simple Capture/Compare Timer written in Verilog. It provides multiple capture/compare channels that use a common counter. Events…
This is an 8080 core I created as a project to get to know Verilog. The 8080 was the second in the series 8008->8080->Z80. It was the second…
This simple HD44780 LCD Driver takes care of the most basic commands such as clear screen, cursor home and writing characters with single bit…
The goal of this project is to provide a simple traffic light controller for different transport modeling purposes like model railways. I repeat…
Technica Corporation is sponsoring a new open source project. Wizardry, an open source network intrusion detection system, provides protocol…
A simple module to get the most of your on board heartbeat LED. Change or add more sequences easily in parameters file.
The System-on-Chip (SoC) Maker is a tool to design and create SoCs in a simple way, written in Ruby. PLEASE NOTE: THIS SOFTWARE IS IN DEVELOPMENT…
The sc2v translator is a software tool that translates a SystemC RT description into a Verilog equivalent one. The sc2v translator is based on lex…
A SystemC/Verilog random number generator based on the combination of a LFSR and a CASR with very good statistical properties. Based on the Thomas…
TimerOCD (Timer Output Compare Drivers) - Targeting the Spartan-6 XC6SLX9-2C (Numato Mimas Spartan-6 FPGA Development board), this project…
An implementation of the Vector Graphic, Inc. Computer System of the early 1980's on a Xilinx Spartan 3E Starter Kit. The Vector ZCB and…
n/a
An Virtual RS232 Terminal developed with Avnet Xilinx Spartan 3A Evaluation Kit ( Spartan XC3S400A ) that has a LVDS LCD Controller (Notebook LCD…
Facebook
Google
GitHub
Linkedin