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The project describes an IPCore in verilog about binary BCH encoder and decoder. BCH is a popular error correcting code used in storage and…
This C++ program generates VHDL package with hamming encoder and decoder. It also generates a simple testbench that can be used to evaluate the…
The double error correcting (DEC) BCH encoder / decoder IP cores. Features : – allows to correct up to 2 errors. – supports…
• Reed Solomon Decoder (204,188), with T=8. • Input codeword length is 204 bytes and output length is 188 bytes. • Corrects up to 8…
This core implements Reed-Solomon decoder for the 8-bit wide symbols. The core is designed to occupy fewer amounts of logic blocks, be fast and…
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This project features a double binary, DVB-RCS turbo decoder using the SOVA algorithm. Two models are included: - a MyHDL model, along with a…
Ultimate CRC is a CRC generator/checker. Using generics the core can be fully customized. It creates a function of the data input and the CRC…
A hamming encoder and decoder with single-error correcting and double-error detecting capability. The message length can be configured through a…
This tool working on WinXP is used to generate verilog-RTL for Reed-Solomon Codec. - Selectable Decoder/Encoder/Both - Symbol width…
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