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34 questions By Tony R. Kuphaldt
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Question 22 of 34
A student builds a four-bit asynchronous counter circuit using CMOS J-K flip-flops. It seems to work . . . most of the time. Every once in a while, the count suddenly and mysteriously “jumps” out of sequence, to a value that is completely wrong. Even stranger than this is the fact that it seems to happen every time the student waves their hand next to the circuit.
What do you suspect the problem to be?
Reveal answerThis is a mistake I see students making all the time. The fact that the circuit is built with CMOS components, and fails whenever an object comes near it, is a strong hint that the problem is related to stray static electric charges. It is an easily corrected problem, caused by the student not taking time to connect all the pins of their flip-flops properly.
Notes:I didn’t exactly reveal the source of trouble in the answer, but I gave enough hints that anyone familiar with CMOS should be able to tell what it is! This truly is a problem I’ve seen many times with my students!
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Question 23 of 34
Identify a single fault that would allow this synchronous counter circuit to count up on demand, but not down:
Explain why your proposed fault would cause the problem.
Reveal answerTwo possibilities are immediately apparent: inverter U5 has a failed-low output, or flip-flop U1 has a failed-low [Q] output.
Notes:Discuss the merit of all faults proposed in answer to this question with your students. Ask them to explain the reasoning behind their answers, and use this as an opportunity to correct conceptual errors about the operation of this circuit.
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Question 24 of 34
A student builds a four-bit asynchronous up counter out of individual J-K flip-flops, but is dissatisfied with its performance:
Although the counting sequence is proper, the circuit usually does not begin counting from 0000 at power-up. The fact that the circuit counts correctly suggests that there is nothing failed or mis-wired, so what could possibly be wrong?
Reveal answerThe flip-flops’ initial states at power-up are essentially random because they are subject to internal race conditions between the constituent gates. What is needed is some form of automatic reset to force all flip-flops to the reset state at power-up.
Notes:This is a very practical issue for state-machine circuits: making sure the circuit begins in the desired state rather than in some random condition.
