Performance-Based Assessments for Digital Circuit Competencies

It should be noted that the input states in this circuit are defined by the voltage levels, not by the contact status. In other words, a closed contact equals a “low” (0) logic state.

I strongly recommend having students build their logic circuits with CMOS chips rather than TTL, because of the less stringent power supply requirements of CMOS. I also recommend drawing a combinational circuit using four gates, because this is the common number of two-input gates found on 14-pin DIP logic chips.

It should be noted that the input states in this circuit are defined by the voltage levels, not by the contact status. In other words, a closed contact equals a “low” (0) logic state.

Here are some suggested Boolean expressions for your students to build gate circuits from:

Output = \({A}{B} + {A}\)

Output = \(\bar{A}{B} + {A}\)

Output = (A + B)A

Output = (A + B)B

Output = \(\bar{A} + {B}\)

Output = \({A} + \bar{B}\)

Output = \(\bar{A}{B}\)

Output = \({A}\bar{B}\)

It should be noted that the input states in this circuit are defined by the voltage levels, not by the contact status. In other words, a closed contact equals a “low” (0) logic state.

Here are some suggested Boolean expressions for your students to build gate circuits from:

Output = AB + C

Output = (A + B)C

Output = \(\bar{A} + {BC}\)

Output = \(\bar{A}{B} + {C}\)