A simple VGA controller written in Verilog. I just add a pixel handler for simplicity.
Data input in single precision formate Able to perform addition and subtraction Features - feature1 - feature1.1 -feature1.2 -feature2 Status -…
Square root calculation for single or double precision ieee 754 floating point numbers. Features - Support for single and double precision ieee 754…
Audio Codec(ADPCM 1-Bit) The code is ready for Altera Cyclone-II DE1 Starter board and it is tested, you can modify codes and use them in any…
This is the first version of a simple I2C slave for 8 bit data transfer written in Verilog. Two pull-up resitors needed for SDA and SCL lines. Any…
This is crypto core with AMBA support APB based on datasheet fom AES_SPEC If you liked our work is want to help contribute to the future progress…
The 8-bit Vedic Multiplier is designed using 4x4 Vedic Multipliers which employs Urdhva Tiryagbhyam sutra.
This is a fully synthesizable DDR3 Memory BFM. Implemented using Verilog 2001 without any vendor specific IP Block. As such, the BFM is not able to…
The goal of this project is to design a generic BCD adder that can adds two BCD inputs and a carry in to produce a BCD sum and a carry out.
A cellular automata (CA) is a discrete model that consists of a grid (1D, 2D, 3D ) with objects called cells. Each cell can be in one of a given…
These cores provide a simple means of converting between binary and BCD in hardware. Written in Verilog, with parameters for the input and output…
A fast (single-cycle) base-2 antilog function. Doesn't run quite as fast as the Log code: 166MHz, vs. 250MHz for the log. Registering the input…
Facebook
Google
GitHub
Linkedin