32 bit pipelined processor. Instruction set is non conventional in that it does not use a conventional decoder for instructions. The instruction…
Work is progessing on version seven of the core. Version eight has been shelved. There are many updates and improvements to the compiler and…
The T400 µController is an implementation of National's 4-bit COP400 microcontroller family architecture. It is intended to be used as a…
8052 compatible microcontroller core. Two different top levels: T8052: - Single cycle synchronous RAM/ROM - Wishbone bus interface for memory…
Configurable cpu core that supports Z80, 8080 and gameboy instruction sets. Z80 and 8080 compability have been proven by numerous implementations…
Configurable cpu core that supports 6502, 65C02 and 65C816 instruction sets. A SoC debug system with ROM, RAM and two 16450 UARTs is included in…
A 6507-compatible microprocessor was developed. It will be used in a SoC that targets the ATARI 2600 system. RIOT(MOS 6532) and TIA chips will be…
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This is a stable Version of a 68000 compatible CPU. It is an adapted Version to use with the Minimig Core. "compatible" means that most…
The Neptune core Neptune is an attempt to create a new, next-generation processor architecture.
Overview Processor: * 8-bit, 4 register processor * Von Neumann architecture * 3 clock cycle per instruction * 16-bit instruction set (inspired by…
Simple minimal VHDL RISC processor. Heavily inspired by Tim Böscke and his MCPU project (Avaiable here on opencores), the processor is an…
Please write a description of the project here. It is used as a MetaTag (search engines looks at this). Functional Block Diagram
Description Tiny64 A 64-Bit RISC CPU with minial resource usage. Every opcode is executed in 2 clock cycles. The word size is configurable via XLEN…
Tiny8 a simple 8 bit microprocessor with classic CISC architecture. The registers resides in RAM addressed via a base pointer in the WP register…
This is a tiny processor meant to be nice and simple. Here are a few of the technical goals of this processor: 1. 8-bit processor (8 bit registers…
The tinyVLIW8 is a 8-bit soft-core processor for deeply embedded control task. The design is fully implemented in VHDL and tested on the Altera DK1…
TotalCPU is RISC core with 12-bit instruction width and variable data width (from 12 to 64 bits). It is completely realized on Verilog-2001 and has…
The PCI IP core (PCI bridge) is a member of a family of open source cores. It is a bus bridge device between the WISHBONE SoC bus and the PCI local…
The TV80 is an 8-bit Z80-compatible microprocessor core, written in Verilog. It is based on Daniel Wallner's VHDL T80 core. Features - executes…