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An n-width Galois LFSR generator written in MyHDL with max-cycle tap positions for selected widths. An table of taps for selected widths is used to…
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Features - direct traceback option. - self test automation - support any popular convolution code. - throughput and area of decoder are scalable. -…
A FPGA development board based on EP2C35F672, with SDRAM and flash .
Griva Basic 1.2v - FPGA development kit ,, , Highlights , , , , , , , , , * Xilinx Spartan3E XS3S250E or XC3S500E -PQG208 , , , , , , , , , , , , ,…
The IIE-PCI Development Platform board is a low cost PCI device card with a programmable logic chip (Altera ACEX), dynamic ram, and expansion…
Project to create generic emulator/debugger/analyzer with on-the-fly reprogrammable firmware on Artec Dongle II board (containing Altera Cyclone…
An FPGA Board with the largest Artix 7 XC7A200T FPGA, USB 2.0 controller, Flash memory, 100 GPIO's and on-board voltage regulators. Features…
Discrete Multi Tone (DMT) is the modulation scheme used for Asymmetric Digital Subscriber Line (ADSL) systems and one of the modulation schemes…
A SystemC/Verilog synthesizable MD5 hash core. This work is given by Universidad Rey Juan Carlos (Spain) For more info about our projects visit…
Cascaded integrator-comb (CIC) digital filters are computationally efficient implementations of narrowband lowpass filters and are often embedded…
VHDL core generator FIRGEN Project generates optimized VHDL codes for FIR Filters and Multiplier arrays using "Nonrecursive Signed Common…
The Advanced Debug Interface is a suite of IP cores and software programs designed to allow a developer to download code to a target CPU in a…
This is a Tcl/Tk script to configure OpenRisc 1200 options. I use it to configure the core and I think it could be usefull for other people. The…
The System-on-Chip (SoC) Maker is a tool to design and create SoCs in a simple way, written in Ruby. PLEASE NOTE: THIS SOFTWARE IS IN DEVELOPMENT…
The ROSETTA Configurable Dot Matrix Display Controller core provides a modular expandable interface for any dimension displays build from LEDs dot…
myBlaze is a synthesizable clone of the MicroBlaze Soft Processor written in myHDL ( http://www.myhdl.org ). It started as a translation of MB-Lite…
NoCmodel is a Python module for Network-on-Chip modeling, with add-ons for simulation (functional or RTL) and code generation (initially VHDL).…
Embedded MIPS R2000 It's a synthesizable parametric IP core of 32 bit RISC processor supporting full MIPS R2000 ISA, by using SystemC HDL. An…
This project shows a 4-bit open system done with Quartus II v12
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