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Category: All IP Cores (1032)

RC4 Pseudo-random Stream Generator

RC4 Pseudo-random Stream Generator

RC4 PRBS (Generates the RC4 stream, then you have to XOR it with your data to crypt or decrypt it), takes 768 clocks to do key-expansion, then…

License : LGPL
Language : Verilog
RC6 Cryptography Algorithm in VHDL

RC6 Cryptography Algorithm in VHDL

The Cryptographic Algorithm which is most widely used throughout the world for protecting information. Cryptography is the art of secret writing,…

License : GPL
Language : VHDL
512 Bit Open-Source RSA Algorithm

512 Bit Open-Source RSA Algorithm

The project presents an open-source implementaion of the 512 bit RSA algorithm. This is a reduced version of a full FIPS Certified capable RSA…

License : LGPL
Language : VHDL
RSA Cryptography Processor using Asymmetric Key

RSA Cryptography Processor using Asymmetric Key

RSA ( Rivest Shamir Adleman )is crypthograph system that used to give a secret information and digital signature . Its security based on Integer…

RTEA 128/256 Symmetric Block Encryption Algorithm

RTEA 128/256 Symmetric Block Encryption Algorithm

RTEA (from Ruptor's TEA or Repaired TEA) - a symmetric block encryption algorithm used type "Feistel cipher", designed by Marcos el…

License : GPL
Language : VHDL
Salsa20 Stream Cipher 32-bit Based Pseudorandom Function

Salsa20 Stream Cipher 32-bit Based Pseudorandom Function

Salsa20 stream cipher is built on a pseudorandom function based on 32-bit addition, bitwise addition (XOR) and rotation operations, which maps a…

License : LGPL
Language : VHDL
Secure Hash Standard SHA256 Algorithm

Secure Hash Standard SHA256 Algorithm

SHA256 running at 199.788MHz on Xilinx's 28nm Kintex 7 speed grade 3 device. Processing speed: 1.598 Gbits per second. Also added an optimised…

License : BSD
Language : VHDL
NIST SHA-3 Algorithm (Keccak)

NIST SHA-3 Algorithm (Keccak)

SHA-3, originally known as Keccak [1], is a cryptographic hash function selected as the winner of the NIST hash function competition [2]. Because…

License : Others
Language : Verilog
SHA256 Hash Algorithm on ModelSim

SHA256 Hash Algorithm on ModelSim

VHDL implementation of the SHA-256 hashing algorithm. This project includes .do files for performing a simulation on ModelSim.

License : GPL
Language : VHDL
Secure Hash Algorithm - SHA Cores in VerilogHDL

Secure Hash Algorithm - SHA Cores in VerilogHDL

This is a collection of SHA(Secure Hash Algorithm) cores. These include SHA-1, SHA-2 algorithms. These cores are non-pipelined version of SHA, and…

License : LGPL
Language : Verilog
SHA1 Secure Hash Algorithm

SHA1 Secure Hash Algorithm

Verilog Implementation of SHA1 Secure Hash Algorithm Status - Initial Release

Twofish 128/192/256 Bit Key Size

Twofish 128/192/256 Bit Key Size

VHDL implementation of the twofish cipher for 128,192 and 256 bit keys. The implementation is in library-like form; All needed components up to,…

License : GPL
Language : VHDL
Bit-Serialized Simon Block Cipher Core

Bit-Serialized Simon Block Cipher Core

The code presented here implements the bit-serialized SIMON block cipher. Please check the following publication for the details of the…

License : LGPL
Language : Verilog
Simple Camellia Crypto Core fpr FPGAs

Simple Camellia Crypto Core fpr FPGAs

( I still have problem to upload files to cvs.opencores......) Features - feature1 - feature1.1 -feature1.2 -feature2 Status - status1 - status2

Language : VHDL
SystemC/Verilog MD5 Hash Core Standard

SystemC/Verilog MD5 Hash Core Standard

A SystemC/Verilog synthesizable MD5 hash core. This work is given by Universidad Rey Juan Carlos (Spain) For more info about our projects visit…

License : LGPL
Language : Other
Grain - A Stream Cipher in VHDL

Grain - A Stream Cipher in VHDL

This project has been MOVED to bitbucket: https://bitbucket.org/vahidigrain

License : LGPL
Language : VHDL
SystemC/Verilog DES Algorithm

SystemC/Verilog DES Algorithm

SystemC DES is a implementation of the DES algorithm in SystemC focusing on low area applications. Implements the encoder and decoder in the same…

Language : Other
Tiny Encryption Algorithm (TEA)

Tiny Encryption Algorithm (TEA)

1 and 64 stage implementations of the Tiny Encryption Algorithm (TEA).

License : BSD
Language : VHDL
128-bit Block Cipher Twofish Core

128-bit Block Cipher Twofish Core

Twofish is a 128-bit block cipher that can accept variable key length 128,192 and 256 bit. In this project we just use key length 128 bit. Twofish…

LinkRunCCA : Linked List & Run-length-based Techniques

LinkRunCCA : Linked List & Run-length-based Techniques

LinkRunCCA is a real-time single-pass connected component analysis/ connected component labeling (CCA/CCL) implemented in Verilog HDL. It can be…

License : LGPL
Language : Verilog