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Category: All IP Cores (1032)

Zorro Bus to Wishbone Bridge

Zorro Bus to Wishbone Bridge

This project intends to create a bridge between Wishbone and the Amiga Zorro II and Zorro III busses. As in the Amiga 3000/4000 computer families,…

License : LGPL
Language : Verilog
System-on-Module ARM SoC with ALTERA FPGA

System-on-Module ARM SoC with ALTERA FPGA

System-on-Module based on an ARM SoC in combination with an ALTERA FPGA. Focus for this module is connectivity, flexibility and a high…

License : LGPL
Language : Verilog
AC 97 Controller for CD Quality Audio Input/Output Implementation

AC 97 Controller for CD Quality Audio Input/Output Implementation

This is a AC 97 Controller Core. It provides a an interface to an external AC 97 Audio Codec. This allows the implementation of CD quality Audio…

Language : Verilog
Configurable 32 Bit PCI Target

Configurable 32 Bit PCI Target

The PCI32tLite IP core provides the funtionality of a PCI TARGET. The core has been designed to permit interface between a PCI Master and simple…

License : LGPL
Language : VHDL
External Parallel to Internal Wishbone Master Interface Microcontroller

External Parallel to Internal Wishbone Master Interface Microcontroller

This core is intended to be used as an interface between some functionality in an FPGA and an external microcontroller. The external…

License : GPL
Language : VHDL
Bluespec H.264 Decoder supporting 1080p at 60 fps

Bluespec H.264 Decoder supporting 1080p at 60 fps

H.264 Decoder supporting 1080p at 60 fps Code Summary ------------ This module implements the baseline profile of the H.264 video codec standard.…

Language : Other
8-Chip Selects Advance Memory Controller IP Core

8-Chip Selects Advance Memory Controller IP Core

This is a advanced Memory Controller intended for embedded applications. Some of the features are: - SDRAM, SSRAM, FLASH, ROM and many other…

Language : Verilog
OpenCores Integrated Drive Electronics IDE Controller

OpenCores Integrated Drive Electronics IDE Controller

ATA (AT attachment) interface core, also known as the IDE (Integrated Drive Electronics) interface. The ATA interface provides a simple interface…

PCI-Express Mini to Wishbone Bridge for Xilinx FPGAs

PCI-Express Mini to Wishbone Bridge for Xilinx FPGAs

pcie_mini IP core PCI-express to Wishbone Bridge for Xilinx FPGAs. Developer: Istvan Nagy, Bluechip Technology, 2011 Very often we want to make a…

License : LGPL
Language : VHDL
16 bit PIPE Spec PCI Express VERA Testbench

16 bit PIPE Spec PCI Express VERA Testbench

pcie_vera_tb FEATURES • 16 bit PIPE Spec PCI Express Testbench • Link training • Initial Flow Control • Packet Classes for easy…

Language : Other
64 bit DMA Channel PCI Express controller

64 bit DMA Channel PCI Express controller

The PCIe_DS_DMA core provides PCI Express controller for Xilinx HARD core for Virtex5, Virtex6, Spartan6, Artix 7 FPGA. Main features PCI Express…

License : LGPL
Language : Verilog & VHDL
CCITT Group 4 (TIFF) Lossless Compression

CCITT Group 4 (TIFF) Lossless Compression

This project considers a hardware implementation of the CCITT group 4(also known as fax4 or tiff) compression algorithm written in vhdl. The design…

License : LGPL
Language : VHDL
Altera Cyclone III 3C120 Video Stream Scaler

Altera Cyclone III 3C120 Video Stream Scaler

The Video Stream Scaler scales streaming video up or down in resolution. Bilinear and nearest neighbor resize modes are supported. This core…

License : LGPL
Language : Verilog
Wishbone Master Interface PCI Mini with 16 MB Memory Image

Wishbone Master Interface PCI Mini with 16 MB Memory Image

This is a very simple PCI-target to Wishbone-master bridge. PCI-Target only, the bandwidth is quite low, fixed memory-image size (16MB), but it has…

License : LGPL
Language : Verilog & VHDL
Power Supply Sequencer for FPGAs

Power Supply Sequencer for FPGAs

Large electronic systems often use multiple supply voltages that must come up and go down in a specified order. Also, it must be made sure that the…

License : BSD
Language : VHDL
Synthesizeable Soft Core RS232 System Controller

Synthesizeable Soft Core RS232 System Controller

rs232_syscon is a synthesizeable soft core that allows debugging of peripherals connected to a Wishbone type of bus. Specifically, it lets the user…

License : LGPL
Language : Verilog & VHDL
Programmable Interrupt Controller (PIC)

Programmable Interrupt Controller (PIC)

“pic” is a soft core, programmable interrupt controller which can be used as an interface between peripheral interrupt lines and…

License : LGPL
Language : VHDL
Wupper: PCIe DMA Engine for Xilinx Virtex-7 FPGA Gen3 Integrated Block

Wupper: PCIe DMA Engine for Xilinx Virtex-7 FPGA Gen3 Integrated Block

Wupper is designed by Nikhef (Amsterdam, The Netherlands) for the CERN ATLAS / FELIX project. Its main purpose is to provide a simple Direct Memory…

License : LGPL
Wishbone Version : B.4
Language : VHDL
SCSI Chip for SRAM Controller and 32 to 8 bits Converter

SCSI Chip for SRAM Controller and 32 to 8 bits Converter

This proyect is designed to adapt either a host system, or a perypherical controller system to a scsi bus. Also the chip is a DMA controller for a…

Language : Verilog
Standalone w/ cPCI Interface TI DSP and Xilinx FPGA Dev Board

Standalone w/ cPCI Interface TI DSP and Xilinx FPGA Dev Board

A project aimed at providing a DSP/FPGA based development board. Testing has begun, so far Power supplies, DSP, FPGAs have been proven to be 100%…

Language : Other