Or try an example search: SD Card Controller
Simple backtracking 9x9 Sudoku solver written in Verilog. Uses an exact cover algorithm to quickly find a solution with minimal backtracking (C…
The Computer Operating Properly Module, COP, is a watchdog timer module that triggers a system reset if it is not regularly serviced by writing two…
The Programmable Interval Timer Module, PIT, is a simple timer to generate a periodic signal for a microcontroller system. This signal may be used…
A scalable synchronous round-robin arbiter. The arbiter is designed to run at reasonable clock speeds with up to hundreds of request lines, and it…
Simple FM Receiver Simple implementation of FM Receiver to demodulate square wave signal modulated in FM. This design uses PLL to demodulate FM…
The pipelined architecture is often used in high speed FPGA cores. In complex designs data processing is often splitted into multiple paths…
Clock Domain Crossing micro FIFO (Verilog/SystemVerilog): cdc_ufifo provide an minimalist fifo. Most advantage - not use RAM blocks. it can be 4…
Facebook
Google
GitHub
Linkedin
