A device that convert a PC parallel port to serial , then serial to parallel. It can transport all signals of the PC parallel port into a single…
Features AES3 / SPDIF compatible receiver locks to any sample rate from 20kHz to 100kHz with 50MHz master clock and reg_width = 5 locks to any…
This IP implements the 1-wire communication protocol (http://en.wikipedia.org/wiki1-Wire). A more detailed documentation is provided in…
Simple asynchronous serial controller (aka UART). Includes 4 byte receive and a 4 byte transmit FIFO (FIFO size can be easily adjusted). External…
Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART…
This core is part of the Milkymist System-on-Chip, the most advanced open source SoC for interactive multimedia applications. Minimal UART core No…
Simple PCM Interface. Allows to interface to such popular devices like TI DSPs (via McBSP bus) in PCM mode. Of course many more applications. Very…
This project's aim is to provide the smart-card side of an ISO 7816-3 interface. Features - Detects reset and sends ATR (Answer to Reset). -…
SpaceWire (SpW) grown organically from the needs of on-board processing applications. It's a network of spacecraft/aerocraft with Routers.…
SpaceWire Light is a SpaceWire encoder-decoder with FIFO interface. It is synthesizable for FPGA targets (up to 200 Mbit on Spartan-3). An optional…
The System Management Bus (SMBus) is a two-wire interface through which simple system and power management related chips can communicate with the…
SPI (Serial Peripheral Interface) is serial, synchronous, full duplex communication protocol. It is widely used as a board-level interface between…
Project information The Modular Simultaneous Exponentiation core is a flexible hardware design to support modular simultaneous exponentiations in…
The SPDIF interface (Standard IEC958 "Digital audio interface") allows transmission of digital audio signals between devices in a digital…
SPDIF Transmitter Github: http://github.com/ultraembedded/cores This is a simple SPDIF transmitter module written in Verilog. This module can…
Modified SPI Master Core by Simon Srot. This core is designed for use with the Spatan 3E, 3A, and 3AN starter kits, for interfacing with the…
Enhanced version of the Serial Peripheral Interface available on Motorola's MC68HC11 family of CPUs.Enhancements include a wider supported…
Simple uart core with wishbone slave interface and programmable baud rate generator, based on clock speed and desired baud rate
This project implements a controller for standard SPI flash ROMs (e.g. ST M25Pxx, Atmel AT25Fxxxx, etc.). For a design using an (embedded)…
An implementation of serial Linear Technologies LTC2624 Quad 12bit DAC using SPI 32bit data transfer method. The core is FPGA proven, works on…
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